2 * This file is part of the coreboot project.
4 * Copyright (C) 2011 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
25 * AMD South Bridge CIMx entry point wrapper
27 void sb_Poweron_Init(void);
28 void sb_Before_Pci_Init(void);
29 void sb_After_Pci_Init(void);
30 void sb_Mid_Post_Init(void);
31 void sb_Late_Post(void);
34 * CIMX not set the clock to 48Mhz until sbBeforePciInit,
35 * coreboot may need to set this even more earlier
37 void sb800_clk_output_48Mhz(void);
39 #if CONFIG_RAMINIT_SYSINFO == 1
41 * @brief Get SouthBridge device number, called by finalize_node_setup()
42 * @param[in] bus target bus number
43 * @return southbridge device number
45 u32 get_sbdn(u32 bus);