2 #include <device/pci_ids.h>
4 #define PCI_DEV(BUS, DEV, FN) ( \
5 (((BUS) & 0xFF) << 16) | \
6 (((DEV) & 0x1f) << 11) | \
9 #define PCI_ID(VENDOR_ID, DEVICE_ID) \
10 ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
12 typedef unsigned device_t;
14 static void pci_write_config8(device_t dev, unsigned where, unsigned char value)
18 outl(0x80000000 | (addr & ~3), 0xCF8);
19 outb(value, 0xCFC + (addr & 3));
22 static void pci_write_config32(device_t dev, unsigned where, unsigned value)
26 outl(0x80000000 | (addr & ~3), 0xCF8);
30 static unsigned pci_read_config32(device_t dev, unsigned where)
34 outl(0x80000000 | (addr & ~3), 0xCF8);
38 #define PCI_DEV_INVALID (0xffffffffU)
39 static device_t pci_locate_device_on_bus(unsigned pci_id, unsigned bus)
42 dev = PCI_DEV(bus, 0, 0);
43 last = PCI_DEV(bus, 31, 7);
44 for(; dev <= last; dev += PCI_DEV(0,0,1)) {
46 id = pci_read_config32(dev, 0);
51 return PCI_DEV_INVALID;
54 #include "../../../northbridge/amd/amdk8/reset_test.c"
62 unsigned link = get_sblk();
65 * There can only be one 8111 on a hypertransport chain/bus.
67 bus = node_link_to_bus(node, link);
68 dev = pci_locate_device_on_bus(
69 PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA),
74 pci_write_config8(dev, 0x47, 1);