2 * (C) 2003 Linux Networx, SuSE Linux AG
4 #include <console/console.h>
5 #include <device/device.h>
6 #include <device/pci.h>
7 #include <device/pci_ids.h>
8 #include <device/pci_ops.h>
9 #include <pc80/mc146818rtc.h>
10 #include <pc80/isa-dma.h>
17 unsigned int value_low, value_high;
20 static struct ioapicreg ioapicregvalues[] = {
21 #define ALL (0xff << 24)
23 #define DISABLED (1 << 16)
24 #define ENABLED (0 << 16)
25 #define TRIGGER_EDGE (0 << 15)
26 #define TRIGGER_LEVEL (1 << 15)
27 #define POLARITY_HIGH (0 << 13)
28 #define POLARITY_LOW (1 << 13)
29 #define PHYSICAL_DEST (0 << 11)
30 #define LOGICAL_DEST (1 << 11)
31 #define ExtINT (7 << 8)
35 /* IO-APIC virtual wire mode configuration */
36 /* mask, trigger, polarity, destination, delivery, vector */
37 { 0, ENABLED | TRIGGER_EDGE | POLARITY_HIGH | PHYSICAL_DEST | ExtINT, NONE},
47 { 10, DISABLED, NONE},
48 { 11, DISABLED, NONE},
49 { 12, DISABLED, NONE},
50 { 13, DISABLED, NONE},
51 { 14, DISABLED, NONE},
52 { 15, DISABLED, NONE},
53 { 16, DISABLED, NONE},
54 { 17, DISABLED, NONE},
55 { 18, DISABLED, NONE},
56 { 19, DISABLED, NONE},
57 { 20, DISABLED, NONE},
58 { 21, DISABLED, NONE},
59 { 22, DISABLED, NONE},
60 { 23, DISABLED, NONE},
61 /* Be careful and don't write past the end... */
64 static void setup_ioapic(void)
67 unsigned long value_low, value_high;
68 unsigned long ioapic_base = 0xfec00000;
69 volatile unsigned long *l;
70 struct ioapicreg *a = ioapicregvalues;
72 l = (unsigned long *) ioapic_base;
74 for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]);
76 l[0] = (a->reg * 2) + 0x10;
79 l[0] = (a->reg *2) + 0x11;
82 if ((i==0) && (value_low == 0xffffffff)) {
83 printk_warning("IO APIC not responding.\n");
86 printk_spew("for IRQ, reg 0x%08x value 0x%08x 0x%08x\n",
87 a->reg, a->value_low, a->value_high);
91 static void enable_hpet(struct device *dev)
93 unsigned long hpet_address;
95 pci_write_config32(dev,0xa0, 0xfed00001);
96 hpet_address=pci_read_config32(dev,0xa0)& 0xfffffffe;
97 printk_debug("enabling HPET @0x%x\n", hpet_address);
100 static void lpc_init(struct device *dev)
106 /* IO APIC initialization */
107 byte = pci_read_config8(dev, 0x4B);
109 pci_write_config8(dev, 0x4B, byte);
112 /* posted memory write enable */
113 byte = pci_read_config8(dev, 0x46);
114 pci_write_config8(dev, 0x46, byte | (1<<0));
116 /* power after power fail */
117 byte = pci_read_config8(dev, 0x43);
123 pci_write_config8(dev, 0x43, byte);
125 /* Enable Port 92 fast reset */
126 byte = pci_read_config8(dev, 0x41);
128 pci_write_config8(dev, 0x41, byte);
130 /* Enable Error reporting */
131 /* Set up sync flood detected */
132 byte = pci_read_config8(dev, 0x47);
134 pci_write_config8(dev, 0x47, byte);
136 /* Set up NMI on errors */
137 byte = pci_read_config8(dev, 0x40);
138 byte |= (1 << 1); /* clear PW2LPC error */
139 byte |= (1 << 6); /* clear LPCERR */
140 pci_write_config8(dev, 0x40, byte);
141 nmi_option = NMI_OFF;
142 get_option(&nmi_option, "nmi");
144 byte |= (1 << 7); /* set NMI */
145 pci_write_config8(dev, 0x40, byte);
148 /* Initialize the real time clock */
151 /* Initialize isa dma */
154 /* Initialize the High Precision Event Timers */
158 static void amd8111_lpc_read_resources(device_t dev)
160 struct resource *res;
162 /* Get the normal pci resources of this device */
163 pci_dev_read_resources(dev);
165 /* Add an extra subtractive resource for both memory and I/O */
166 res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
167 res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
169 res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
170 res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
173 static void amd8111_lpc_enable_resources(device_t dev)
175 pci_dev_enable_resources(dev);
176 enable_childrens_resources(dev);
180 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
182 pci_write_config32(dev, 0x70,
183 ((device & 0xffff) << 16) | (vendor & 0xffff));
185 static struct pci_operations lops_pci = {
186 .set_subsystem = lpci_set_subsystem,
188 static struct device_operations lpc_ops = {
189 .read_resources = amd8111_lpc_read_resources,
190 .set_resources = pci_dev_set_resources,
191 .enable_resources = amd8111_lpc_enable_resources,
193 .scan_bus = scan_static_bus,
194 .enable = amd8111_enable,
195 .ops_pci = &lops_pci,
198 static struct pci_driver lpc_driver __pci_driver = {
200 .vendor = PCI_VENDOR_ID_AMD,
201 .device = PCI_DEVICE_ID_AMD_8111_ISA,