2 * This file is part of the coreboot project.
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 u32 mct_SetDramConfigMisc2(struct DCTStatStruc *pDCTstat, u8 dct, u32 misc2)
24 if (pDCTstat->LogicalCPUID & (AMD_DR_Dx | AMD_DR_Cx)) {
25 if (pDCTstat->Status & (1 << SB_Registered)) {
26 misc2 |= 1 << SubMemclkRegDly;
27 if (mctGet_NVbits(NV_MAX_DIMMS) == 8)
28 misc2 |= 1 << Ddr3FourSocketCh;
30 misc2 &= ~(1 << Ddr3FourSocketCh);
33 if (pDCTstat->LogicalCPUID & AMD_DR_Cx)
34 misc2 |= 1 << OdtSwizzle;
35 val = Get_NB32(pDCTstat->dev_dct, dct * 0x100 + 0x78);
38 val = ((~val) & 0xFF) + 1;
42 misc2 |= val << 16; /* DataTxFifoWrDly */