1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_IRQ_SLOT_COUNT
8 uses CONFIG_HAVE_OPTION_TABLE
10 uses CONFIG_MAX_PHYSICAL_CPUS
11 uses CONFIG_LOGICAL_CPUS
14 uses CONFIG_FALLBACK_SIZE
16 uses CONFIG_ROM_SECTION_SIZE
17 uses CONFIG_ROM_IMAGE_SIZE
18 uses CONFIG_ROM_SECTION_SIZE
19 uses CONFIG_ROM_SECTION_OFFSET
20 uses CONFIG_ROM_PAYLOAD
21 uses CONFIG_ROM_PAYLOAD_START
22 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
23 uses CONFIG_PRECOMPRESSED_PAYLOAD
24 uses CONFIG_PAYLOAD_SIZE
26 uses CONFIG_XIP_ROM_SIZE
27 uses CONFIG_XIP_ROM_BASE
28 uses CONFIG_STACK_SIZE
30 uses CONFIG_USE_OPTION_TABLE
31 uses CONFIG_LB_CKS_RANGE_START
32 uses CONFIG_LB_CKS_RANGE_END
33 uses CONFIG_LB_CKS_LOC
34 uses CONFIG_HAVE_ACPI_TABLES
35 uses CONFIG_HAVE_ACPI_RESUME
36 uses CONFIG_HAVE_LOW_TABLES
38 uses CONFIG_HAVE_SMI_HANDLER
40 uses CONFIG_MAINBOARD_PART_NUMBER
41 uses CONFIG_MAINBOARD_VENDOR
42 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
43 uses CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
44 uses COREBOOT_EXTRA_VERSION
47 uses CONFIG_CROSS_COMPILE
51 uses CONFIG_TTYS0_BAUD
52 uses CONFIG_TTYS0_BASE
54 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
55 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
56 uses CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL
57 uses CONFIG_CONSOLE_SERIAL8250
58 uses CONFIG_CONSOLE_BTEXT
59 uses CONFIG_HAVE_INIT_TIMER
61 uses CONFIG_CONSOLE_VGA
62 uses CONFIG_VGA_ROM_RUN
63 uses CONFIG_PCI_ROM_RUN
64 uses CONFIG_HW_MEM_HOLE_SIZEK
66 uses CONFIG_USE_DCACHE_RAM
67 uses CONFIG_DCACHE_RAM_BASE
68 uses CONFIG_DCACHE_RAM_SIZE
70 uses CONFIG_USE_PRINTK_IN_CAR
72 uses CONFIG_ENABLE_APIC_EXT_ID
73 uses CONFIG_APIC_ID_OFFSET
74 uses CONFIG_LIFT_BSP_APIC_ID
76 uses CONFIG_PCI_64BIT_PREF_MEM
78 uses CONFIG_HT_CHAIN_UNITID_BASE
79 uses CONFIG_HT_CHAIN_END_UNITID_BASE
80 uses CONFIG_SB_HT_CHAIN_ON_BUS0
81 uses CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
83 uses CONFIG_LB_MEM_TOPK
85 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
86 default CONFIG_ROM_SIZE=512*1024
89 ## CONFIG_FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
91 #default CONFIG_FALLBACK_SIZE=131072
93 default CONFIG_FALLBACK_SIZE=0x40000
100 ## Build code for the fallback boot
102 default CONFIG_HAVE_FALLBACK_BOOT=1
105 ## Build code to reset the motherboard from coreboot
107 default CONFIG_HAVE_HARD_RESET=1
112 default CONFIG_HAVE_SMI_HANDLER=0
115 ## Build code to export a programmable irq routing table
117 default CONFIG_HAVE_PIRQ_TABLE=1
118 default CONFIG_IRQ_SLOT_COUNT=11
121 ## Build code to export an x86 MP table
122 ## Useful for specifying IRQ routing values
124 default CONFIG_HAVE_MP_TABLE=1
127 ## Build code to provide ACPI support
129 default CONFIG_HAVE_ACPI_TABLES=1
130 default CONFIG_HAVE_LOW_TABLES=1
131 default CONFIG_MULTIBOOT=0
134 ## Build code to export a CMOS option table
136 default CONFIG_HAVE_OPTION_TABLE=1
139 ## Move the default coreboot cmos range off of AMD RTC registers
141 default CONFIG_LB_CKS_RANGE_START=49
142 default CONFIG_LB_CKS_RANGE_END=122
143 default CONFIG_LB_CKS_LOC=123
146 default CONFIG_CONSOLE_VGA=1
147 default CONFIG_PCI_ROM_RUN=1
148 default CONFIG_VGA_ROM_RUN=1
151 ## Build code for SMP support
152 ## Only worry about 2 micro processors
155 default CONFIG_MAX_CPUS=4
156 default CONFIG_MAX_PHYSICAL_CPUS=2
157 default CONFIG_LOGICAL_CPUS=1
160 default CONFIG_HW_MEM_HOLE_SIZEK=0x100000
162 ##HT Unit ID offset, default is 1, the typical one
163 default CONFIG_HT_CHAIN_UNITID_BASE=0x0
165 ##real SB Unit ID, default is 0x20, mean dont touch it at last
166 #default CONFIG_HT_CHAIN_END_UNITID_BASE=0x0
168 #make the SB HT chain on bus 0, default is not (0)
169 default CONFIG_SB_HT_CHAIN_ON_BUS0=2
171 ##only offset for SB chain?, default is yes(1)
172 #default CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=0
175 #default CONFIG_CONSOLE_BTEXT=1
178 default CONFIG_CONSOLE_VGA=1
179 default CONFIG_PCI_ROM_RUN=1
182 ## enable CACHE_AS_RAM specifics
184 default CONFIG_USE_DCACHE_RAM=1
185 default CONFIG_DCACHE_RAM_BASE=0xcf000
186 default CONFIG_DCACHE_RAM_SIZE=0x1000
187 default CONFIG_USE_INIT=0
189 default CONFIG_ENABLE_APIC_EXT_ID=0
190 default CONFIG_APIC_ID_OFFSET=0x10
191 default CONFIG_LIFT_BSP_APIC_ID=0
194 #default CONFIG_PCI_64BIT_PREF_MEM=1
197 ## Build code to setup a generic IOAPIC
199 default CONFIG_IOAPIC=1
202 ## Clean up the motherboard id strings
204 default CONFIG_MAINBOARD_PART_NUMBER="s2891"
205 default CONFIG_MAINBOARD_VENDOR="Tyan"
206 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x10f1
207 default CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x2891
210 ### coreboot layout values
213 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
214 default CONFIG_ROM_IMAGE_SIZE = 65536
217 ## Use a small 8K stack
219 default CONFIG_STACK_SIZE=0x2000
222 ## Use a small 16K heap
224 default CONFIG_HEAP_SIZE=0x4000
227 ## Only use the option table in a normal image
229 default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
232 ## Coreboot C code runs at this location in RAM
234 default CONFIG_RAMBASE=0x00004000
237 ## Load the payload from the ROM
239 default CONFIG_ROM_PAYLOAD = 1
242 ### Defaults of options that you may want to override in the target config file
246 ## The default compiler
248 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
249 default CONFIG_HOSTCC="gcc"
252 ## Disable the gdb stub by default
254 default CONFIG_GDB_STUB=0
256 default CONFIG_USE_PRINTK_IN_CAR=1
259 ## The Serial Console
262 # To Enable the Serial Console
263 default CONFIG_CONSOLE_SERIAL8250=1
265 ## Select the serial console baud rate
266 default CONFIG_TTYS0_BAUD=115200
267 #default CONFIG_TTYS0_BAUD=57600
268 #default CONFIG_TTYS0_BAUD=38400
269 #default CONFIG_TTYS0_BAUD=19200
270 #default CONFIG_TTYS0_BAUD=9600
271 #default CONFIG_TTYS0_BAUD=4800
272 #default CONFIG_TTYS0_BAUD=2400
273 #default CONFIG_TTYS0_BAUD=1200
275 # Select the serial console base port
276 default CONFIG_TTYS0_BASE=0x3f8
278 # Select the serial protocol
279 # This defaults to 8 data bits, 1 stop bit, and no parity
280 default CONFIG_TTYS0_LCS=0x3
283 ### Select the coreboot loglevel
285 ## EMERG 1 system is unusable
286 ## ALERT 2 action must be taken immediately
287 ## CRIT 3 critical conditions
288 ## ERR 4 error conditions
289 ## WARNING 5 warning conditions
290 ## NOTICE 6 normal but significant condition
291 ## INFO 7 informational
292 ## CONFIG_DEBUG 8 debug-level messages
293 ## SPEW 9 Way too many details
295 ## Request this level of debugging output
296 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
297 ## At a maximum only compile in this level of debugging
298 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
301 ## Select power on after power fail setting
302 default CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
309 default CONFIG_CBFS=0