src/mainboard/tyan/s2735/Config.lb

   1 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
   2 default CONFIG_XIP_ROM_SIZE = 64 * 1024
   3 include /config/nofailovercalculation.lb
   4 default CONFIG_ROM_PAYLOAD = 1
   5
   6 arch i386 end
   7
   8 ##
   9 ## Build the objects we have code for in this directory.
  10 ##
  11
  12 driver mainboard.o
  13 if CONFIG_HAVE_MP_TABLE object mptable.o end
  14 if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
  15 object reset.o
  16 if CONFIG_USE_INIT
  17
  18 makerule ./auto.o
  19         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  20         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  21 end
  22
  23 else
  24
  25 makerule ./auto.inc
  26         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  27         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  28         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
  29         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
  30 end
  31
  32 end
  33
  34 ##
  35 ## Build our 16 bit and 32 bit coreboot entry code
  36 ##
  37 mainboardinit cpu/x86/16bit/entry16.inc
  38 mainboardinit cpu/x86/32bit/entry32.inc
  39 ldscript /cpu/x86/16bit/entry16.lds
  40         if CONFIG_USE_INIT
  41                 ldscript /cpu/x86/32bit/entry32.lds
  42         end
  43
  44         if CONFIG_USE_INIT
  45                 ldscript      /cpu/x86/car/cache_as_ram.lds
  46         end
  47
  48
  49 ##
  50 ## Build our reset vector (This is where coreboot is entered)
  51 ##
  52 if CONFIG_USE_FALLBACK_IMAGE
  53         mainboardinit cpu/x86/16bit/reset16.inc
  54         ldscript /cpu/x86/16bit/reset16.lds
  55 else
  56         mainboardinit cpu/x86/32bit/reset32.inc
  57         ldscript /cpu/x86/32bit/reset32.lds
  58 end
  59
  60 ##
  61 ## Include an id string (For safe flashing)
  62 ##
  63 mainboardinit arch/i386/lib/id.inc
  64 ldscript /arch/i386/lib/id.lds
  65
  66 ##
  67 ## Setup Cache-As-Ram
  68 ##
  69 mainboardinit cpu/x86/car/cache_as_ram.inc
  70
  71 ###
  72 ### This is the early phase of coreboot startup
  73 ### Things are delicate and we test to see if we should
  74 ### failover to another image.
  75 ###
  76 if CONFIG_USE_FALLBACK_IMAGE
  77        ldscript /arch/i386/lib/failover.lds
  78 end
  79
  80 ##
  81 ## Setup RAM
  82 ##
  83 if CONFIG_USE_INIT
  84 initobject auto.o
  85 else
  86 mainboardinit ./auto.inc
  87 end
  88
  89 ##
  90 ## Include the secondary Configuration files
  91 ##
  92 config chip.h
  93
  94 # sample config for tyan/s2735
  95 chip northbridge/intel/e7501
  96         device pci_domain 0 on
  97                 device pci 0.0 on end
  98                 device pci 0.1 on end
  99                 device pci 2.0 on
 100                         chip southbridge/intel/i82870
 101                                 device pci 1c.0 on end
 102                                 device pci 1d.0 on
 103                                         chip drivers/pci/onboard
 104                                                 device pci 1.0 on end # intel lan
 105                                                 device pci 1.1 on end
 106                                         end
 107                                 end
 108                                 device pci 1e.0 on end
 109                                 device pci 1f.0 on end
 110                         end
 111                 end
 112                 device pci 6.0 on end
 113                 chip southbridge/intel/i82801er
 114                         device pci 1d.0 on end
 115                         device pci 1d.1 on end
 116                         device pci 1d.2 on end
 117                         device pci 1d.3 on end
 118                         device pci 1d.7 on end
 119                         device pci 1e.0 on
 120                                 chip drivers/pci/onboard
 121                                         device pci 1.0 on end # intel lan 10/100
 122                                 end
 123                                 chip drivers/pci/onboard
 124                                         device pci 2.0 on end # ati
 125                                 end
 126                         end
 127                         device pci 1f.0 on
 128                                 chip superio/winbond/w83627hf
 129                                         device pnp 2e.0 on #  Floppy
 130                                                 io 0x60 = 0x3f0
 131                                                 irq 0x70 = 6
 132                                                 drq 0x74 = 2
 133                                         end
 134                                         device pnp 2e.1 off #  Parallel Port
 135                                                 io 0x60 = 0x378
 136                                                 irq 0x70 = 7
 137                                         end
 138                                         device pnp 2e.2 on #  Com1
 139                                                 io 0x60 = 0x3f8
 140                                                 irq 0x70 = 4
 141                                         end
 142                                         device pnp 2e.3 on #  Com2
 143                                                 io 0x60 = 0x2f8
 144                                                 irq 0x70 = 3
 145                                         end
 146                                         device pnp 2e.5 on #  Keyboard
 147                                                 io 0x60 = 0x60
 148                                                 io 0x62 = 0x64
 149                                                 irq 0x70 = 1
 150                                                 irq 0x72 = 12
 151                                         end
 152                                         device pnp 2e.6 off #  CIR
 153                                                 io 0x60 = 0x100
 154                                         end
 155                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 156                                                 io 0x60 = 0x220
 157                                                 io 0x62 = 0x300
 158                                                 irq 0x70 = 9
 159                                         end
 160                                         device pnp 2e.8 off end #  GPIO2
 161                                         device pnp 2e.9 off end #  GPIO3
 162                                         device pnp 2e.a off end #  ACPI
 163                                         device pnp 2e.b on #  HW Monitor
 164                                                 io 0x60 = 0x290
 165                                                 irq 0x70 = 5
 166                                         end
 167                                 end
 168                         end
 169                         device pci 1f.1 off end
 170                         device pci 1f.2 on end
 171                         device pci 1f.3 on end
 172                         device pci 1f.5 off end
 173                         device pci 1f.6 off end
 174                 end # SB
 175         end # PCI_DOMAIN
 176         device apic_cluster 0 on
 177                 chip cpu/intel/socket_mPGA604
 178                         device apic 0 on end
 179                 end
 180                 chip cpu/intel/socket_mPGA604
 181                         device apic 6 on end
 182                 end
 183         end
 184 end
 185