1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_HAVE_OPTION_TABLE
8 uses CONFIG_USE_OPTION_TABLE
10 uses CONFIG_ROM_PAYLOAD
12 uses CONFIG_IRQ_SLOT_COUNT
14 uses CONFIG_MAINBOARD_VENDOR
15 uses CONFIG_MAINBOARD_PART_NUMBER
16 uses COREBOOT_EXTRA_VERSION
18 uses CONFIG_FALLBACK_SIZE
19 uses CONFIG_STACK_SIZE
22 uses CONFIG_ROM_SECTION_SIZE
23 uses CONFIG_ROM_IMAGE_SIZE
24 uses CONFIG_ROM_SECTION_SIZE
25 uses CONFIG_ROM_SECTION_OFFSET
26 uses CONFIG_ROM_PAYLOAD_START
27 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
28 uses CONFIG_PRECOMPRESSED_PAYLOAD
29 uses CONFIG_PAYLOAD_SIZE
32 uses CONFIG_XIP_ROM_SIZE
33 uses CONFIG_XIP_ROM_BASE
34 uses CONFIG_HAVE_MP_TABLE
35 uses CONFIG_CROSS_COMPILE
39 uses CONFIG_TTYS0_BAUD
40 uses CONFIG_TTYS0_BASE
44 uses CONFIG_CONSOLE_SERIAL8250
47 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
48 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
50 default CONFIG_CONSOLE_SERIAL8250=1
51 ## Select the serial console baud rate
52 default CONFIG_TTYS0_BAUD=115200
53 #default CONFIG_TTYS0_BAUD=57600
54 #default CONFIG_TTYS0_BAUD=38400
55 #default CONFIG_TTYS0_BAUD=19200
56 #default CONFIG_TTYS0_BAUD=9600
57 #default CONFIG_TTYS0_BAUD=4800
58 #default CONFIG_TTYS0_BAUD=2400
59 #default CONFIG_TTYS0_BAUD=1200
61 # Select the serial console base port
62 default CONFIG_TTYS0_BASE=0x2f8
64 # Select the serial protocol
65 # This defaults to 8 data bits, 1 stop bit, and no parity
66 default CONFIG_TTYS0_LCS=0x3
69 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=9
70 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=9
71 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
72 default CONFIG_ROM_SIZE = 256*1024
79 ## Build code for the fallback boot
81 default CONFIG_HAVE_FALLBACK_BOOT=1
86 default CONFIG_HAVE_MP_TABLE=0
89 ## Build code to reset the motherboard from coreboot
91 default CONFIG_HAVE_HARD_RESET=0
94 ## Build code to export a programmable irq routing table
96 default CONFIG_HAVE_PIRQ_TABLE=1
97 default CONFIG_IRQ_SLOT_COUNT=7
101 ## Build code to export a CMOS option table
103 default CONFIG_HAVE_OPTION_TABLE=1
106 ### coreboot layout values
109 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
110 default CONFIG_ROM_IMAGE_SIZE = 65536
111 default CONFIG_FALLBACK_SIZE = 131072
114 ## Use a small 8K stack
116 default CONFIG_STACK_SIZE=0x2000
119 ## Use a small 16K heap
121 default CONFIG_HEAP_SIZE=0x4000
124 ## Only use the option table in a normal image
126 #default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
127 default CONFIG_USE_OPTION_TABLE = 0
129 default CONFIG_RAMBASE = 0x00004000
131 default CONFIG_ROM_PAYLOAD = 1
134 ## The default compiler
136 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
137 default CONFIG_HOSTCC="gcc"
143 default CONFIG_CBFS=0