1 default CONFIG_ROM_SIZE = 128 * 1024
2 default CONFIG_FALLBACK_SIZE = 0x10000
4 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
5 default CONFIG_XIP_ROM_SIZE = 32 * 1024
6 include /config/nofailovercalculation.lb
9 ## Set all of the defaults for an x86 architecture
15 ## Build the objects we have code for in this directory.
19 if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
26 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
27 action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
30 makerule ./failover.inc
31 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
32 action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
36 depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
37 action "../romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
40 depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
41 action "../romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
45 ## Build our 16 bit and 32 bit coreboot entry code
47 mainboardinit cpu/x86/16bit/entry16.inc
48 mainboardinit cpu/x86/32bit/entry32.inc
49 ldscript /cpu/x86/16bit/entry16.lds
50 ldscript /cpu/x86/32bit/entry32.lds
53 ## Build our reset vector (This is where coreboot is entered)
55 if CONFIG_USE_FALLBACK_IMAGE
56 mainboardinit cpu/x86/16bit/reset16.inc
57 ldscript /cpu/x86/16bit/reset16.lds
59 mainboardinit cpu/x86/32bit/reset32.inc
60 ldscript /cpu/x86/32bit/reset32.lds
63 ### Should this be in the northbridge code?
64 mainboardinit arch/i386/lib/cpu_reset.inc
67 ## Include an id string (For safe flashing)
69 mainboardinit arch/i386/lib/id.inc
70 ldscript /arch/i386/lib/id.lds
73 ### This is the early phase of coreboot startup
74 ### Things are delicate and we test to see if we should
75 ### failover to another image.
77 if CONFIG_USE_FALLBACK_IMAGE
78 ldscript /arch/i386/lib/failover.lds
79 mainboardinit ./failover.inc
84 #if CONFIG_CONSOLE_VGA
85 # default CONFIG_PCI_ROM_RUN=1
88 ### O.k. We aren't just an intermediary anymore!
94 mainboardinit cpu/x86/fpu/enable_fpu.inc
95 mainboardinit ./auto.inc
98 ## Include the secondary Configuration files
105 device pci_domain 0 on
106 device pci 0.0 on end
108 # chip drivers/pci/onboard
109 # device pci 12.0 on end # enet
111 # chip drivers/pci/onboard
112 # device pci 14.0 on end # 69000
113 # register "rom_address" = "0x2000000"
115 # register "com1" = "{1}"
116 # register "com1" = "{1, 0, 0x3f8, 4}"