Re-integrate "USE_OPTION_TABLE" code.
[coreboot.git] / src / mainboard / supermicro / x6dhe_g2 / Kconfig
1 config BOARD_SUPERMICRO_X6DHE_G2
2         bool "X6DHE-G2"
3         select ARCH_X86
4         select CPU_INTEL_SOCKET_MPGA604
5         select NORTHBRIDGE_INTEL_E7520
6         select SOUTHBRIDGE_INTEL_I82801EX
7         select SOUTHBRIDGE_INTEL_PXHD
8         select SUPERIO_NSC_PC87427
9         select ROMCC
10         select HAVE_HARD_RESET
11         select BOARD_HAS_HARD_RESET
12         select HAVE_OPTION_TABLE
13         select HAVE_PIRQ_TABLE
14         select HAVE_MP_TABLE
15         select BOARD_ROMSIZE_KB_1024
16         select USE_WATCHDOG_ON_BOOT
17         select DRIVERS_GENERIC_DEBUG
18
19 config MAINBOARD_DIR
20         string
21         default supermicro/x6dhe_g2
22         depends on BOARD_SUPERMICRO_X6DHE_G2
23
24 config MAINBOARD_PART_NUMBER
25         string
26         default "X6DHE-G2"
27         depends on BOARD_SUPERMICRO_X6DHE_G2
28
29 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
30         hex
31         default 0x15d9
32         depends on BOARD_SUPERMICRO_X6DHE_G2
33
34 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
35         hex
36         default 0x6080
37         depends on BOARD_SUPERMICRO_X6DHE_G2
38
39 config MAX_CPUS
40         int
41         default 4
42         depends on BOARD_SUPERMICRO_X6DHE_G2
43
44 config IRQ_SLOT_COUNT
45         int
46         default 15
47         depends on BOARD_SUPERMICRO_X6DHE_G2
48