src/mainboard/intel/xe7501devkit/irq_tables.c

   1 /* Run checkpir to verify any changes to this table...\r
   2    Documentation at : http://www.microsoft.com/whdc/archive/pciirq.mspx\r
   3 */\r
   4 \r
   5 #include <arch/pirq_routing.h>\r
   6 #include <device/pci_def.h>\r
   7 #include <device/pci_ids.h>\r
   8 #include "bus.h"\r
   9 \r
  10 #define UNUSED_INTERRUPT {0, 0}\r
  11 #define PIRQ_A 0x60\r
  12 #define PIRQ_B 0x61\r
  13 #define PIRQ_C 0x62\r
  14 #define PIRQ_D 0x63\r
  15 #define PIRQ_E 0x68\r
  16 #define PIRQ_F 0x69\r
  17 #define PIRQ_G 0x6A\r
  18 #define PIRQ_H 0x6B\r
  19 \r
  20 const struct irq_routing_table intel_irq_routing_table = {\r
  21         PIRQ_SIGNATURE,\r
  22         PIRQ_VERSION,\r
  23         32 + 12*sizeof(struct irq_info),                // Size of this struct in bytes\r
  24         0,                                                                              // PCI bus number on which the interrupt router resides\r
  25         PCI_DEVFN(31, 0),                                       // PCI device/function number of the interrupt router\r
  26         0,                                                                              // PCI-exclusive IRQ bitmap\r
  27         PCI_VENDOR_ID_INTEL,                                    // Vendor ID of compatible PCI interrupt router\r
  28         PCI_DEVICE_ID_INTEL_82801CA_LPC,                // Device ID of compatible PCI interrupt router\r
  29         0,                                                                              // Additional miniport information\r
  30         { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },    // Reserved, must be zero\r
  31         0xB1,                                                                   // Checksum of the entire structure (causes 8-bit sum == 0)\r
  32         {\r
  33                 // NOTE: For 82801, a nonzero link value is a pointer to a PIRQ[n]_ROUT register in PCI configuration space\r
  34                 //               This was determined from linux-2.6.11/arch/i386/pci/irq.c\r
  35                 // bitmap of 0xdcf8 == routable to IRQ3-IRQ7, IRQ10-IRQ12, or IRQ14-IRQ15\r
  36                 // ICH-3 doesn't allow SERIRQ or PCI message to generate IRQ0, IRQ2, IRQ8, or IRQ13\r
  37                 // Not sure why IRQ9 isn't routable (inherited from Tyan S2735)\r
  38                 \r
  39                 //                                                                                      INTA#                      INTB#                     INTC#                    INTD#\r
  40         //  bus,                                device #                   {link  , bitmap}, {link  , bitmap}, {link  , bitmap}, {link  , bitmap},  slot, rfu\r
  41                 \r
  42                 {PCI_BUS_CHIPSET,       PCI_DEVFN(31, 0), {{PIRQ_C, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // IDE / SMBus\r
  43                 {PCI_BUS_CHIPSET,       PCI_DEVFN(29, 0), {{PIRQ_A, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_C, 0xdcf8}, UNUSED_INTERRUPT},   0, 0},    // USB 1.1\r
  44                 \r
  45                 // P64H2#2 Bus A\r
  46                 {PCI_BUS_P64H2_2_A, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // SCSI\r
  47                         // NOTE: Hotplug disabled on this bus\r
  48                 \r
  49                 // P64H2#2 Bus B\r
  50                 {PCI_BUS_P64H2_2_B, PCI_DEVFN(1, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  23, 0},        // Slot 2A (J23)\r
  51                 {PCI_BUS_P64H2_2_B, PCI_DEVFN(2, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  24, 0},        // Slot 2B (J24)\r
  52                 {PCI_BUS_P64H2_2_B, PCI_DEVFN(3, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  25, 0},        // Slot 2C (J25)\r
  53                 {PCI_BUS_P64H2_2_B, PCI_DEVFN(4, 0),  {{PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}, {PIRQ_B, 0xdcf8}},  12, 0},        // Slot 2D (J12)\r
  54                         // NOTE: Hotplug disabled on this bus\r
  55 \r
  56                 // P64H2#1 Bus A\r
  57                 {PCI_BUS_P64H2_1_A, PCI_DEVFN(1, 0),  {{PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}},  20, 0},        // Slot 1A (J20)\r
  58                         // NOTE: Hotplug disabled on this bus\r
  59 \r
  60                 // P64H2#1 Bus B\r
  61                 {PCI_BUS_P64H2_1_B, PCI_DEVFN(1, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},        // GB Ethernet\r
  62                 {PCI_BUS_P64H2_1_B, PCI_DEVFN(2, 0),  {{PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_A, 0xdcf8}},  21, 0},        // Slot 1B (J21)\r
  63                         // NOTE: Hotplug disabled on this bus\r
  64         \r
  65                 // ICH-3 PCI bus\r
  66                 {PCI_BUS_ICH3,          PCI_DEVFN(0, 0),  {{PIRQ_A, 0xdcf8}, UNUSED_INTERRUPT, UNUSED_INTERRUPT, UNUSED_INTERRUPT},   0, 0},    // Video\r
  67                 {PCI_BUS_ICH3,          PCI_DEVFN(2, 0),  {{PIRQ_C, 0xdcf8}, {PIRQ_D, 0xdcf8}, {PIRQ_A, 0xdcf8}, {PIRQ_B, 0xdcf8}},  11, 0},    // Debug slot (J11)\r
  68         }\r
  69 };\r
  70 \r
  71 unsigned long write_pirq_routing_table(unsigned long addr)\r
  72 {\r
  73         return copy_pirq_routing_table(addr);\r
  74 }\r