1 uses CONFIG_HAVE_MP_TABLE
3 uses CONFIG_HAVE_PIRQ_TABLE
4 uses CONFIG_USE_FALLBACK_IMAGE
5 uses CONFIG_HAVE_FALLBACK_BOOT
6 uses CONFIG_HAVE_HARD_RESET
7 uses CONFIG_HAVE_OPTION_TABLE
8 uses CONFIG_USE_OPTION_TABLE
9 uses CONFIG_ROM_PAYLOAD
10 uses CONFIG_IRQ_SLOT_COUNT
12 uses CONFIG_MAINBOARD_VENDOR
13 uses CONFIG_MAINBOARD_PART_NUMBER
14 uses COREBOOT_EXTRA_VERSION
16 uses CONFIG_FALLBACK_SIZE
17 uses CONFIG_STACK_SIZE
20 uses CONFIG_ROM_SECTION_SIZE
21 uses CONFIG_ROM_IMAGE_SIZE
22 uses CONFIG_ROM_SECTION_SIZE
23 uses CONFIG_ROM_SECTION_OFFSET
24 uses CONFIG_ROM_PAYLOAD_START
25 uses CONFIG_PAYLOAD_SIZE
28 uses CONFIG_XIP_ROM_SIZE
29 uses CONFIG_XIP_ROM_BASE
30 uses CONFIG_HAVE_MP_TABLE
31 uses CONFIG_CROSS_COMPILE
35 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
36 uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
37 uses CONFIG_CONSOLE_SERIAL8250
38 uses CONFIG_TTYS0_BAUD
39 uses CONFIG_TTYS0_BASE
41 uses CONFIG_UDELAY_TSC
42 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
43 uses CONFIG_CONSOLE_VGA
44 uses CONFIG_PCI_ROM_RUN
45 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
46 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
47 uses CONFIG_PRECOMPRESSED_PAYLOAD
49 uses CONFIG_PIRQ_ROUTE
51 ## CONFIG_ROM_SIZE is the size of boot ROM that this board will use.
52 default CONFIG_ROM_SIZE = 256*1024
59 default CONFIG_CONSOLE_VGA=1
60 default CONFIG_PCI_ROM_RUN=1
63 ## Build code for the fallback boot
65 default CONFIG_HAVE_FALLBACK_BOOT=0
70 default CONFIG_HAVE_MP_TABLE=0
73 ## Build code to reset the motherboard from coreboot
75 default CONFIG_HAVE_HARD_RESET=0
77 ## Delay timer options
79 default CONFIG_UDELAY_TSC=1
80 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
83 ## Build code to export a programmable irq routing table
85 default CONFIG_HAVE_PIRQ_TABLE=1
86 default CONFIG_IRQ_SLOT_COUNT=7
87 default CONFIG_PIRQ_ROUTE=1
91 ## Build code to export a CMOS option table
93 default CONFIG_HAVE_OPTION_TABLE=1
96 ### coreboot layout values
99 ## CONFIG_ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
100 default CONFIG_ROM_IMAGE_SIZE = 65536
101 default CONFIG_FALLBACK_SIZE = 131072
104 ## Use a small 8K stack
106 default CONFIG_STACK_SIZE=0x2000
109 ## Use a small 16K heap
111 default CONFIG_HEAP_SIZE=0x4000
114 ## Only use the option table in a normal image
116 #default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
117 default CONFIG_USE_OPTION_TABLE = 0
119 default CONFIG_RAMBASE = 0x00004000
121 default CONFIG_ROM_PAYLOAD = 1
124 ## The default compiler
126 default CONFIG_CROSS_COMPILE=""
127 default CC="$(CONFIG_CROSS_COMPILE)gcc -m32"
128 default CONFIG_HOSTCC="gcc"
131 ## The Serial Console
134 # To Enable the Serial Console
135 default CONFIG_CONSOLE_SERIAL8250=1
137 ## Select the serial console baud rate
138 default CONFIG_TTYS0_BAUD=115200
139 #default CONFIG_TTYS0_BAUD=57600
140 #default CONFIG_TTYS0_BAUD=38400
141 #default CONFIG_TTYS0_BAUD=19200
142 #default CONFIG_TTYS0_BAUD=9600
143 #default CONFIG_TTYS0_BAUD=4800
144 #default CONFIG_TTYS0_BAUD=2400
145 #default CONFIG_TTYS0_BAUD=1200
147 # Select the serial console base port
148 default CONFIG_TTYS0_BASE=0x3f8
150 # Select the serial protocol
151 # This defaults to 8 data bits, 1 stop bit, and no parity
152 default CONFIG_TTYS0_LCS=0x3
155 ### Select the coreboot loglevel
157 ## EMERG 1 system is unusable
158 ## ALERT 2 action must be taken immediately
159 ## CRIT 3 critical conditions
160 ## ERR 4 error conditions
161 ## WARNING 5 warning conditions
162 ## NOTICE 6 normal but significant condition
163 ## INFO 7 informational
164 ## CONFIG_DEBUG 8 debug-level messages
165 ## SPEW 9 Way too many details
167 ## Request this level of debugging output
168 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
170 ## At a maximum only compile in this level of debugging
171 default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL=8
173 default CONFIG_VIDEO_MB = 0
180 default CONFIG_CBFS=0