2 uses USE_FALLBACK_IMAGE
3 uses HAVE_FALLBACK_BOOT
5 uses CONFIG_ROM_PAYLOAD
9 uses MAINBOARD_PART_NUMBER
10 uses COREBOOT_EXTRA_VERSION
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_PAYLOAD_START
22 uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
23 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
24 uses CONFIG_PRECOMPRESSED_PAYLOAD
34 uses DEFAULT_CONSOLE_LOGLEVEL
35 uses MAXIMUM_CONSOLE_LOGLEVEL
36 uses CONFIG_CONSOLE_SERIAL8250
40 uses CONFIG_UDELAY_TSC
41 uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
42 # uses CONFIG_CONSOLE_VGA
43 # uses CONFIG_PCI_ROM_RUN
47 ## ROM_SIZE is the size of boot ROM that this board will use.
48 default ROM_SIZE = 256 * 1024
55 ## Build code for the fallback boot
57 default HAVE_FALLBACK_BOOT=1
60 ## Build code to reset the motherboard from coreboot
62 default HAVE_HARD_RESET=0
64 ## Delay timer options
66 default CONFIG_UDELAY_TSC=1
67 default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
70 ## Build code to export a programmable irq routing table
72 default HAVE_PIRQ_TABLE=1
73 default IRQ_SLOT_COUNT=5 # TODO?
76 ## Build code to export a CMOS option table
78 # default HAVE_OPTION_TABLE=0
81 ### coreboot layout values
84 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
85 default ROM_IMAGE_SIZE = 64 * 1024
86 default FALLBACK_SIZE = 128 * 1024
89 ## Use a small 8K stack
91 default STACK_SIZE=0x2000
94 ## Use a small 16K heap
96 default HEAP_SIZE=0x4000
99 ## Only use the option table in a normal image
101 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
102 # default USE_OPTION_TABLE = 0
104 default _RAMBASE = 0x00004000
106 default CONFIG_ROM_PAYLOAD = 1
109 ## The default compiler
111 default CROSS_COMPILE=""
112 default CC="$(CROSS_COMPILE)gcc -m32"
116 ## The Serial Console
119 # To Enable the Serial Console
120 default CONFIG_CONSOLE_SERIAL8250=1
122 ## Select the serial console baud rate
123 default TTYS0_BAUD=115200
124 #default TTYS0_BAUD=57600
125 #default TTYS0_BAUD=38400
126 #default TTYS0_BAUD=19200
127 #default TTYS0_BAUD=9600
128 #default TTYS0_BAUD=4800
129 #default TTYS0_BAUD=2400
130 #default TTYS0_BAUD=1200
132 # Select the serial console base port
133 default TTYS0_BASE=0x3f8
135 # Select the serial protocol
136 # This defaults to 8 data bits, 1 stop bit, and no parity
137 default TTYS0_LCS=0x3
140 ### Select the coreboot loglevel
142 ## EMERG 1 system is unusable
143 ## ALERT 2 action must be taken immediately
144 ## CRIT 3 critical conditions
145 ## ERR 4 error conditions
146 ## WARNING 5 warning conditions
147 ## NOTICE 6 normal but significant condition
148 ## INFO 7 informational
149 ## DEBUG 8 debug-level messages
150 ## SPEW 9 Way too many details
152 ## Request this level of debugging output
153 default DEFAULT_CONSOLE_LOGLEVEL=9
154 ## At a maximum only compile in this level of debugging
155 default MAXIMUM_CONSOLE_LOGLEVEL=9
158 # default CONFIG_CONSOLE_VGA=1
159 # default CONFIG_PCI_ROM_RUN=1
160 default CONFIG_VIDEO_MB = 0