1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <device/pci.h>
7 static unsigned node_link_to_bus(unsigned node, unsigned link)
12 dev = dev_find_slot(0, PCI_DEVFN(0x18, 1));
16 for(reg = 0xE0; reg < 0xF0; reg += 0x04) {
21 config_map = pci_read_config32(dev, reg);
22 if ((config_map & 3) != 3) {
25 dst_node = (config_map >> 4) & 7;
26 dst_link = (config_map >> 8) & 3;
27 bus_base = (config_map >> 16) & 0xff;
29 printk_debug("node.link=bus: %d.%d=%d 0x%2x->0x%08x\n",
30 dst_node, dst_link, bus_base,
33 if ((dst_node == node) && (dst_link == link))
41 void *smp_write_config_table(void *v)
43 static const char sig[4] = "PCMP";
44 static const char oem[8] = "LNXI ";
45 static const char productid[12] = "HDAMA ";
46 struct mp_config_table *mc;
47 unsigned char bus_num;
48 unsigned char bus_isa;
49 unsigned char bus_chain_0;
50 unsigned char bus_8131_1;
51 unsigned char bus_8131_2;
52 unsigned char bus_8111_1;
54 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
55 memset(mc, 0, sizeof(*mc));
57 memcpy(mc->mpc_signature, sig, sizeof(sig));
58 mc->mpc_length = sizeof(*mc); /* initially just the header */
60 mc->mpc_checksum = 0; /* not yet computed */
61 memcpy(mc->mpc_oem, oem, sizeof(oem));
62 memcpy(mc->mpc_productid, productid, sizeof(productid));
65 mc->mpc_entry_count = 0; /* No entries yet... */
66 mc->mpc_lapic = LAPIC_ADDR;
71 smp_write_processors(mc);
77 bus_chain_0 = node_link_to_bus(0, 0);
78 if (bus_chain_0 == 0) {
79 printk_debug("ERROR - cound not find bus for node 0 chain 0, using defaults\n");
84 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x03,0));
86 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
87 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
91 printk_debug("ERROR - could not find PCI 1:03.0, using defaults\n");
97 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,0));
99 bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
103 printk_debug("ERROR - could not find PCI 1:01.0, using defaults\n");
108 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,0));
110 bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
114 printk_debug("ERROR - could not find PCI 1:02.0, using defaults\n");
120 /* define bus and isa numbers */
121 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
122 smp_write_bus(mc, bus_num, "PCI ");
124 smp_write_bus(mc, bus_isa, "ISA ");
126 /* IOAPIC handling */
127 smp_write_ioapic(mc, 2, 0x11, 0xfec00000);
130 struct resource *res;
132 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x01,1));
134 res = find_resource(dev, PCI_BASE_ADDRESS_0);
136 smp_write_ioapic(mc, 0x03, 0x11, res->base);
140 dev = dev_find_slot(bus_chain_0, PCI_DEVFN(0x02,1));
142 res = find_resource(dev, PCI_BASE_ADDRESS_0);
144 smp_write_ioapic(mc, 0x04, 0x11, res->base);
149 /* ISA backward compatibility interrupts */
150 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
151 bus_isa, 0x00, 0x02, 0x00);
152 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
153 bus_isa, 0x01, 0x02, 0x01);
154 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
155 bus_isa, 0x00, 0x02, 0x02);
156 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
157 bus_isa, 0x03, 0x02, 0x03);
158 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
159 bus_isa, 0x04, 0x02, 0x04);
160 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
161 bus_isa, 0x05, 0x02, 0x05);
162 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
163 bus_isa, 0x06, 0x02, 0x06);
164 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
165 bus_isa, 0x07, 0x02, 0x07);
166 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
167 bus_isa, 0x08, 0x02, 0x08);
168 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
169 bus_isa, 0x09, 0x02, 0x09);
170 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
171 bus_isa, 0x0a, 0x02, 0x0a);
172 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
173 bus_isa, 0x0b, 0x02, 0x0b);
174 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
175 bus_isa, 0x0c, 0x02, 0x0c);
176 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
177 bus_isa, 0x0d, 0x02, 0x0d);
178 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
179 bus_isa, 0x0e, 0x02, 0x0e);
180 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
181 bus_isa, 0x0f, 0x02, 0x0f);
183 /* Standard local interrupt assignments */
184 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
185 bus_isa, 0x00, MP_APIC_ALL, 0x00);
186 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
187 bus_isa, 0x00, MP_APIC_ALL, 0x01);
189 /* PCI Ints: Type Trigger Polarity Bus ID PCIDEVNUM|IRQ APIC ID PIN# */
191 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x03<<2)|0, 0x02, 0x13);
192 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x04<<2)|0, 0x02, 0x13);
195 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|0, 0x02, 0x11);
196 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|1, 0x02, 0x12);
197 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|2, 0x02, 0x13);
198 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x01<<2)|3, 0x02, 0x10);
201 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|0, 0x02, 0x12);
202 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|1, 0x02, 0x13);
203 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|2, 0x02, 0x10);
204 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x02<<2)|3, 0x02, 0x11);
207 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x02, 0x11);
208 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x02, 0x12);
209 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|2, 0x02, 0x13);
210 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|3, 0x02, 0x10);
213 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, 0x02, 0x12);
214 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|1, 0x02, 0x13);
215 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|2, 0x02, 0x10);
216 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|3, 0x02, 0x11);
219 #warning "FIXME get the irqs right, it's just hacked to work for now"
220 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, 0x02, 0x11);
221 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|1, 0x02, 0x12);
222 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|2, 0x02, 0x13);
223 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|3, 0x02, 0x10);
226 #warning "FIXME get the irqs right, it's just hacked to work for now"
227 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|0, 0x02, 0x10);
228 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|1, 0x02, 0x11);
229 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|2, 0x02, 0x12);
230 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x04<<2)|3, 0x02, 0x13);
232 /* There is no extension information... */
234 /* Compute the checksums */
235 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
236 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
237 printk_debug("Wrote the mp table end at: %p - %p\n",
238 mc, smp_next_mpe_entry(mc));
239 return smp_next_mpe_entry(mc);
242 unsigned long write_smp_table(unsigned long addr)
245 v = smp_write_floating_table(addr);
246 return (unsigned long)smp_write_config_table(v);