3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses HARD_RESET_FUNCTION
10 uses HAVE_OPTION_TABLE
19 uses ROM_SECTION_OFFSET
20 uses CONFIG_ROM_STREAM
21 uses CONFIG_ROM_STREAM_START
29 uses LB_CKS_RANGE_START
33 uses MAINBOARD_PART_NUMBER
35 uses MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
36 uses MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
37 uses LINUXBIOS_EXTRA_VERSION
44 uses DEFAULT_CONSOLE_LOGLEVEL
45 uses MAXIMUM_CONSOLE_LOGLEVEL
46 uses MAINBOARD_POWER_ON_AFTER_POWER_FAIL
47 uses CONFIG_CONSOLE_SERIAL8250
56 ## ROM_SIZE is the size of boot ROM that this board will use.
58 default ROM_SIZE=524288
61 ## FALLBACK_SIZE is the amount of the ROM the complete fallback image will use
63 default FALLBACK_SIZE=131072
66 ## Build code for the fallback boot
68 default HAVE_FALLBACK_BOOT=1
71 ## Build code to reset the motherboard from linuxBIOS
73 default HAVE_HARD_RESET=1
76 ## Funky hard reset implementation
78 default HARD_RESET_BUS=1
79 default HARD_RESET_DEVICE=4
80 default HARD_RESET_FUNCTION=0
83 ## Build code to export a programmable irq routing table
85 default HAVE_PIRQ_TABLE=1
86 default IRQ_SLOT_COUNT=9
89 ## Build code to export an x86 MP table
90 ## Useful for specifying IRQ routing values
92 default HAVE_MP_TABLE=1
95 ## Build code to export a CMOS option table
97 default HAVE_OPTION_TABLE=1
100 ## Move the default LinuxBIOS cmos range off of AMD RTC registers
102 default LB_CKS_RANGE_START=49
103 default LB_CKS_RANGE_END=122
104 default LB_CKS_LOC=123
107 ## Build code for SMP support
108 ## Only worry about 2 micro processors
111 default CONFIG_MAX_CPUS=2
114 ## Build code to setup a generic IOAPIC
116 default CONFIG_IOAPIC=1
119 ## Clean up the motherboard id strings
121 default MAINBOARD_PART_NUMBER="HDAMA"
122 default MAINBOARD_VENDOR="ARIMA"
123 default MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x161f
124 default MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x3016
128 ### LinuxBIOS layout values
131 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
132 default ROM_IMAGE_SIZE = 65536
135 ## Use a small 8K stack
137 default STACK_SIZE=0x2000
140 ## Use a small 16K heap
142 default HEAP_SIZE=0x4000
145 ## Only use the option table in a normal image
147 default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
150 ## LinuxBIOS C code runs at this location in RAM
152 default _RAMBASE=0x00004000
155 ## Load the payload from the ROM
157 default CONFIG_ROM_STREAM = 1
160 ### Defaults of options that you may want to override in the target config file
164 ## The default compiler
170 ## Disable the gdb stub by default
172 default CONFIG_GDB_STUB=0
175 ## The Serial Console
178 # To Enable the Serial Console
179 default CONFIG_CONSOLE_SERIAL8250=1
181 ## Select the serial console baud rate
182 default TTYS0_BAUD=115200
183 #default TTYS0_BAUD=57600
184 #default TTYS0_BAUD=38400
185 #default TTYS0_BAUD=19200
186 #default TTYS0_BAUD=9600
187 #default TTYS0_BAUD=4800
188 #default TTYS0_BAUD=2400
189 #default TTYS0_BAUD=1200
191 # Select the serial console base port
192 default TTYS0_BASE=0x3f8
194 # Select the serial protocol
195 # This defaults to 8 data bits, 1 stop bit, and no parity
196 default TTYS0_LCS=0x3
199 ### Select the linuxBIOS loglevel
201 ## EMERG 1 system is unusable
202 ## ALERT 2 action must be taken immediately
203 ## CRIT 3 critical conditions
204 ## ERR 4 error conditions
205 ## WARNING 5 warning conditions
206 ## NOTICE 6 normal but significant condition
207 ## INFO 7 informational
208 ## DEBUG 8 debug-level messages
209 ## SPEW 9 Way too many details
211 ## Request this level of debugging output
212 default DEFAULT_CONSOLE_LOGLEVEL=8
213 ## At a maximum only compile in this level of debugging
214 default MAXIMUM_CONSOLE_LOGLEVEL=8
217 ## Select power on after power fail setting
218 default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"