2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <arch/pirq_routing.h>
21 #include <console/console.h>
23 #include <arch/pirq_routing.h>
24 #include "../../../southbridge/amd/cs5536/cs5536.h"
33 #define M_PIRQA (1 << PIRQA) /* Bitmap of supported IRQs */
34 #define M_PIRQB (1 << PIRQB) /* Bitmap of supported IRQs */
35 #define M_PIRQC (1 << PIRQC) /* Bitmap of supported IRQs */
36 #define M_PIRQD (1 << PIRQD) /* Bitmap of supported IRQs */
39 #define L_PIRQA 1 /* Means Slot INTx# Connects To Chipset INTA# */
40 #define L_PIRQB 2 /* Means Slot INTx# Connects To Chipset INTB# */
41 #define L_PIRQC 3 /* Means Slot INTx# Connects To Chipset INTC# */
42 #define L_PIRQD 4 /* Means Slot INTx# Connects To Chipset INTD# */
44 const struct irq_routing_table intel_irq_routing_table = {
45 PIRQ_SIGNATURE, /* u32 signature */
46 PIRQ_VERSION, /* u16 version */
47 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
48 0x00, /* Where the interrupt router lies (bus) */
49 (0x0F << 3) | 0x0, /* Where the interrupt router lies (dev) */
50 0x00, /* IRQs devoted exclusively to PCI usage */
53 0, /* Crap (miniport) */
54 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, /* u8 rfu[11] */
55 0x00, /* u8 checksum , this has to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
57 /* If you change the number of entries, change the CONFIG_IRQ_SLOT_COUNT above! */
58 /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
59 {0x00, (0x01 << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* cpu */
60 {0x00, (0x0F << 3) | 0x0, {{L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}, {L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}}, 0x0, 0x0}, /* chipset */
61 {0x00, (0x0D << 3) | 0x0, {{L_PIRQB, M_PIRQB}, {0x00, 0x00}, {0x00, 0x00}, {0x00, 0x00}}, 0x0, 0x0}, /* ethernet */
62 {0x00, (0x0E << 3) | 0x0, {{L_PIRQC, M_PIRQC}, {L_PIRQD, M_PIRQD}, {L_PIRQA, M_PIRQA}, {L_PIRQB, M_PIRQB}}, 0x1, 0x0}, /* slot1 */
66 unsigned long write_pirq_routing_table(unsigned long addr)
68 return copy_pirq_routing_table(addr);