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HEAD
All these boards already had the CACHE_AS_RAM option in their individual
[coreboot.git]
/
src
/
mainboard
/
amd
/
db800
/
Kconfig
1
if BOARD_AMD_DB800
2
3
config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select ARCH_X86
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select CPU_AMD_LX
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select NORTHBRIDGE_AMD_LX
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select SOUTHBRIDGE_AMD_CS5536
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select SUPERIO_WINBOND_W83627HF
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select BOARD_ROMSIZE_KB_256
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config MAINBOARD_DIR
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string
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default amd/db800
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config MAINBOARD_PART_NUMBER
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string
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default "DB800"
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config IRQ_SLOT_COUNT
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int
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default 4
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endif # BOARD_AMD_DB800