2 * This file is part of the coreboot project.
4 * Copyright (C) 2007-2008 coresystems GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 "movb $0x30, %al\noutb %al, $0x80\n"
28 "orl $(1 << 30), %eax\n"
31 "movb $0x31, %al\noutb %al, $0x80\n"
34 "movl $MTRRdefType_MSR, %ecx\n"
36 "andl $(~(1 << 11)), %eax\n"
39 "movb $0x32, %al\noutb %al, $0x80\n"
45 "movl $MTRRphysBase_MSR(0), %ecx\n"
47 "movl $MTRRphysMask_MSR(0), %ecx\n"
49 "movl $MTRRphysBase_MSR(1), %ecx\n"
51 "movl $MTRRphysMask_MSR(1), %ecx\n"
54 "movb $0x33, %al\noutb %al, $0x80\n"
56 #ifdef CLEAR_FIRST_1M_RAM
57 "movb $0x34, %al\noutb %al, $0x80\n"
58 /* Enable Write Combining and Speculative Reads for the first 1MB */
59 "movl $MTRRphysBase_MSR(0), %ecx\n"
60 "movl $(0x00000000 | MTRR_TYPE_WRCOMB), %eax\n"
63 "movl $MTRRphysMask_MSR(0), %ecx\n"
64 "movl $(~(1024*1024 -1) | (1 << 11)), %eax\n"
65 "movl $0x0000000f, %edx\n" // 36bit address space
67 "movb $0x35, %al\noutb %al, $0x80\n"
72 "andl $~( (1 << 30) | (1 << 29) ), %eax\n"
75 "movb $0x36, %al\noutb %al, $0x80\n"
76 #ifdef CLEAR_FIRST_1M_RAM
78 /* Clear first 1MB of RAM */
79 "movl $0x00000000, %edi\n"
82 "movl $((1024*1024) / 4), %ecx\n"
85 "movb $0x37, %al\noutb %al, $0x80\n"
90 "orl $(1 << 30), %eax\n"
93 "movb $0x38, %al\noutb %al, $0x80\n"
95 /* Enable Write Back and Speculative Reads for the first 1MB */
96 "movl $MTRRphysBase_MSR(0), %ecx\n"
97 "movl $(0x00000000 | MTRR_TYPE_WRBACK), %eax\n"
100 "movl $MTRRphysMask_MSR(0), %ecx\n"
101 "movl $(~(1024*1024 -1) | (1 << 11)), %eax\n"
102 "movl $0x0000000f, %edx // 36bit address space\n"
105 "movb $0x39, %al\noutb %al, $0x80\n"
107 /* And Enable Cache again after setting MTRRs */
109 "andl $~( (1 << 30) | (1 << 29) ), %eax\n"
112 "movb $0x3a, %al\noutb %al, $0x80\n"
115 "movl $MTRRdefType_MSR, %ecx\n"
117 "orl $(1 << 11), %eax\n"
120 "movb $0x3b, %al\noutb %al, $0x80\n"
122 /* Enable prefetchers */
123 "movl $0x01a0, %ecx\n"
125 "andl $~((1 << 9) | (1 << 19)), %eax\n"
126 "andl $~((1 << 5) | (1 << 7)), %edx\n"
129 /* Invalidate the cache again */
131 "movb $0x3c, %al\noutb %al, $0x80\n"