2 /* be warned, this file will be used core 0/node 0 only */
4 static void __attribute__((noinline)) clear_init_ram(void)
6 // gcc 3.4.5 will inline the copy_and_run and clear_init_ram in post_cache_as_ram
7 // will reuse %edi as 0 from clear_memory for copy_and_run part, actually it is increased already
8 // so noline clear_init_ram
9 clear_memory(0, ((CONFIG_LB_MEM_TOPK<<10) - DCACHE_RAM_SIZE));
13 /* be warned, this file will be used by core other than core 0/node 0 or core0/node0 when cpu_reset*/
14 static inline __attribute__((always_inline)) void set_init_ram_access(void)
22 /* enable caching for first 1M using variable mtrr */
23 "movl $0x200, %%ecx\n\t"
24 "xorl %%edx, %%edx\n\t"
25 "movl $(0 | 6), %%eax\n\t"
26 // "movl $(0 | MTRR_TYPE_WRBACK), %%eax\n\t"
29 "movl $0x201, %%ecx\n\t"
30 "movl $0x0000000f, %%edx\n\t"
32 "movl %%esi, %%eax\n\t"
34 "movl $((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800), %%eax\n\t"
39 /* enable caching for 64K using fixed mtrr */
40 "movl $0x26e, %%ecx\n\t" /* fix4k_f0000*/
41 "movl $0x1e1e1e1e, %%eax\n\t" /* WB MEM type */
42 "movl %%eax, %%edx\n\t"
44 "movl $0x26f, %%ecx\n\t" /* fix4k_f8000*/
55 "S"((~(( 0 + (CONFIG_LB_MEM_TOPK<<10) ) -1)) | 0x800)