2 use IEEE.std_logic_1164.all;
3 use IEEE.numeric_std.all;
9 ADDR_WIDTH : integer range 1 to integer'high;
10 DATA_WIDTH : integer range 1 to integer'high
16 wr_addr, rd_addr1, rd_addr2 : in std_logic_vector(ADDR_WIDTH-1 downto 0);
19 data_in : in std_logic_vector(DATA_WIDTH-1 downto 0);
22 data_out1, data_out2: out std_logic_vector(DATA_WIDTH-1 downto 0)