initial files of pc_communication
[hwmod.git] / src / beh_pc_communication_tb.vhd
diff --git a/src/beh_pc_communication_tb.vhd b/src/beh_pc_communication_tb.vhd
new file mode 100644 (file)
index 0000000..c862095
--- /dev/null
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+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+use work.gen_pkg.all;
+use work.textmode_vga_component_pkg.all;
+use work.textmode_vga_pkg.all;
+use work.textmode_vga_platform_dependent_pkg.all;
+
+entity beh_pc_communication_tb is
+end entity beh_pc_communication_tb;
+
+architecture sim of beh_pc_communication_tb is
+begin
+       -- display
+       inst : entity work.pc_communication(beh)
+       port map (
+               sys_clk => sys_clk,
+               sys_res_n => sys_res_n,
+
+               --button=> ,
+               btn_a => btn_a,
+
+               --uart_tx=> ,
+               tx_data => tx_data,
+               tx_new => tx_new,
+               tx_done => tx_done,
+
+               --uart_rx=> ,
+               rx_data => rx_data,
+               rx_new => rx_new,
+
+               -- History=> ,
+               d_zeile => d_zeile,
+               d_spalte => d_spalte,
+               d_get => d_get,
+               d_done => d_done,
+               d_char => d_char--,
+       );
+
+       clk : process
+       begin
+               sys_clk <= '0';
+               wait for 15 ns;
+               sys_clk <= '1';
+               wait for 15 ns;
+               if stop = true then
+                       wait;
+               end if;
+       end process clk;
+
+       stub_history process (d_get)
+               file f : text open read_mode is "../../src/pc_communication.test";
+       begin
+               if rising_edge(d_get) then
+                       read(f, d_char);
+                       wait 30 ns;
+                       done <= d_done;
+               end if;
+       end process stub_history;
+
+       process
+       begin
+               -- init & reset
+               -- we only simulate pressing of button a by now!
+               sys_res_n <= 0;
+               wait for 100 ns;
+               sys_res_n <= 1;
+
+               btn_a <= 1;
+               wait;
+       end process;
+end architecture sim;