--- /dev/null
+--------------------------------------------------------------------------------------
+Timing Analyzer Summary
+--------------------------------------------------------------------------------------
+
+Type : Worst-case tsu
+Slack : N/A
+Required Time : None
+Actual Time : 7.774 ns
+From : RESET
+To : demo:inst|knightlight[5]
+From Clock : --
+To Clock : CLK
+Failed Paths : 0
+
+Type : Worst-case tco
+Slack : N/A
+Required Time : None
+Actual Time : 9.507 ns
+From : demo:inst|knightlight[0]
+To : LEDS[0]
+From Clock : CLK
+To Clock : --
+Failed Paths : 0
+
+Type : Worst-case th
+Slack : N/A
+Required Time : None
+Actual Time : -7.313 ns
+From : RESET
+To : demo:inst|counter[2]
+From Clock : --
+To Clock : CLK
+Failed Paths : 0
+
+Type : Clock Setup: 'pll:inst1|altpll:altpll_component|_clk0'
+Slack : 3.604 ns
+Required Time : 100.00 MHz ( period = 10.000 ns )
+Actual Time : 156.35 MHz ( period = 6.396 ns )
+From : demo:inst|counter[3]
+To : demo:inst|counter[1]
+From Clock : pll:inst1|altpll:altpll_component|_clk0
+To Clock : pll:inst1|altpll:altpll_component|_clk0
+Failed Paths : 0
+
+Type : Clock Hold: 'pll:inst1|altpll:altpll_component|_clk0'
+Slack : 0.391 ns
+Required Time : 100.00 MHz ( period = 10.000 ns )
+Actual Time : N/A
+From : demo:inst|knightlight[5]
+To : demo:inst|knightlight[5]
+From Clock : pll:inst1|altpll:altpll_component|_clk0
+To Clock : pll:inst1|altpll:altpll_component|_clk0
+Failed Paths : 0
+
+Type : Total number of failed paths
+Slack :
+Required Time :
+Actual Time :
+From :
+To :
+From Clock :
+To Clock :
+Failed Paths : 0
+
+--------------------------------------------------------------------------------------
+