interrupt version 1
[calu.git] / cpu / src / writeback_stage_b.vhd
index a64906b8f96cd936f6f95a03548918ab9926458f..a4d30f68d535f108d39bb58c490176808e26fd3c 100755 (executable)
@@ -17,8 +17,12 @@ signal data_addr : word_t;
 
 signal wb_reg, wb_reg_nxt : writeback_rec;
 
-signal ext_uart,ext_timer,ext_gpmp,ext_7seg :  extmod_rec;
-signal ext_uart_out, ext_timer_out, ext_gpmp_out : gp_register_t;
+signal ext_uart,ext_timer,ext_gpmp,ext_7seg,ext_int :  extmod_rec;
+signal ext_uart_out, ext_timer_out, ext_gpmp_out, ext_int_out : gp_register_t;
+
+--signal int_req : interrupt_t;
+signal uart_int : std_logic;
+
 
 signal sel_nxt, dmem_we, ext_anysel : std_logic;
 
@@ -53,6 +57,7 @@ uart : extension_uart
                        reset,
                        ext_uart,
                        ext_uart_out,
+                       uart_int,
                        bus_rx,
                        bus_tx
                );
@@ -70,6 +75,22 @@ sseg : extension_7seg
                sseg2,
                sseg3
                );
+
+interrupt : extension_interrupt
+       generic map(
+               RESET_VALUE
+               )
+       port map(
+               clk,
+               reset,
+               ext_int,
+               ext_int_out,
+
+               uart_int,
+
+               int_req
+
+               );
        
 syn: process(clk, reset)
 
@@ -282,32 +303,54 @@ begin
   ext_7seg.sel <='0';
   ext_timer.sel <='0';
   ext_gpmp.sel <='0';
+  ext_int.sel <= '0';
   
   ext_uart.wr_en <= wr_en;
   ext_7seg.wr_en <= wr_en;
   ext_timer.wr_en <= wr_en;
   ext_gpmp.wr_en <= wr_en;
-  
+  ext_int.wr_en <= wr_en;  
+
   ext_uart.byte_en <= byte_en;
   ext_7seg.byte_en <= byte_en;
   ext_timer.byte_en <= byte_en;
   ext_gpmp.byte_en <= byte_en;
-  
+  ext_int.byte_en <= byte_en;  
+
   ext_uart.addr <= addr;
   ext_7seg.addr <= addr;
   ext_timer.addr <= addr;
   ext_gpmp.addr <= addr;
+  ext_int.addr <= addr;
 
   ext_uart.data <= data;
   ext_7seg.data <= data;
   ext_timer.data <= data;
   ext_gpmp.data <= data;
+  ext_int.data <= data;
+
    -- wenn ich hier statt dem 4rer die konstante nehme dann gibts an fehler wegen nicht lokaler variable -.-
  case addrid is
     when EXT_UART_ADDR => 
        ext_uart.sel <= enable;
                ext_anysel <= enable;
 
+--             ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
+--             ext_uart.data <= ram_data;
+--             ext_uart.addr <= wb_reg_nxt.address(31 downto 2);
+--             case wb_reg_nxt.address(1 downto 0) is
+--                             when "00" => ext_uart.byte_en <= "0001";
+--                             when "01" => ext_uart.byte_en <= "0010";
+--                             when "10" => ext_uart.byte_en <= "0100";
+--                             --when "11" => ext_uart.byte_en <= "1000";
+--                             when "11" => ext_uart.byte_en <= "1111";
+--                             when others => null;
+--                     end case;
+
+    when EXT_INT_ADDR => 
+       ext_int.sel <= enable;
+               ext_anysel <= enable;
+
 --             ext_uart.wr_en <= wb_reg_nxt.dmem_write_en;
 --             ext_uart.data <= ram_data;
 --             ext_uart.addr <= wb_reg_nxt.address(31 downto 2);