2nd forward unit - 58MHz with 31bit shift...

[calu.git] / cpu / src / pipeline_tb.vhd

diff --git a/cpu/src/pipeline_tb.vhd b/cpu/src/pipeline_tb.vhd
index 0f1949504fd3f8c59361ffa5b24d169ef15871eb..d51196b00deb2a3869dd20630babf00b6a31b700 100644 (file)
--- a/cpu/src/pipeline_tb.vhd
+++ b/cpu/src/pipeline_tb.vhd
@@ -116,7 +116,7 @@ begin
                );
           exec_st : execute_stage
                 generic map('0')
-                port map(sys_clk_pin, sys_res_n_pin,to_next_stage_pin, result_pin, result_addr_pin,addr_pin,
+                port map(sys_clk_pin, sys_res_n_pin,to_next_stage_pin,reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, result_pin, result_addr_pin,addr_pin,
                 data_pin, alu_jump_pin,brpr_pin, wr_en_pin, dmem_pin,dmem_wr_en_pin,hword_pin,byte_s_pin);
 
           writeback_st : writeback_stage