timer: added as extension modul

[calu.git] / cpu / src / extension_timer_pkg.vhd

diff --git a/cpu/src/extension_timer_pkg.vhd b/cpu/src/extension_timer_pkg.vhd
new file mode 100644 (file)
index 0000000..c2d7250
--- /dev/null
+++ b/cpu/src/extension_timer_pkg.vhd
@@ -0,0 +1,21 @@
+library IEEE;
+
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+use work.common_pkg.all;
+use work.extension_pkg.all;
+
+package extension_timer_pkg is
+       component extension_timer is
+       generic ( RESET_VALUE : std_logic);
+       port(
+                       --System inputs
+                       clk :   in std_logic;
+                       reset : in std_logic;
+                       -- general extension interface
+                       ext_reg  : in extmod_rec;
+                       data_out : out gp_register_t
+               );
+       end component extension_timer;
+end package extension_timer_pkg;