Update AMD F14 Agesa to support Rev C0 cpus

[coreboot.git] / src / vendorcode / amd / agesa / f14 / Proc / Mem / NB / C32 / mnParTrainc32.c

diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnParTrainc32.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnParTrainc32.c
index d683da8e5dc259906b75e47ddeab8e229a6ed928..b3f0a8ee14fc2c63837d75abc00554b9f957fc00 100644 (file)
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnParTrainc32.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/C32/mnParTrainc32.c
@@ -217,7 +217,7 @@ MemConstructRemoteNBBlockC32 (
   //----------------------------------------------------------------------------
   // Get TSC rate of the this AP
   //----------------------------------------------------------------------------
-  GetCpuServicesOfCurrentCore (&FamilySpecificServices, &NBPtr->MemPtr->StdHeader);
+  GetCpuServicesOfCurrentCore ((const CPU_SPECIFIC_SERVICES **)&FamilySpecificServices, &NBPtr->MemPtr->StdHeader);
   FamilySpecificServices->GetTscRate (FamilySpecificServices, &NBPtr->MemPtr->TscRate, &NBPtr->MemPtr->StdHeader);
 
   return TRUE;