Update AMD F14 Agesa to support Rev C0 cpus

[coreboot.git] / src / vendorcode / amd / agesa / f14 / Proc / GNB / Modules / GnbPcieInitLibV1 / PciePortServices.c

diff --git a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c
index b2c490f122d3f0dfea421791cf2df84036455fa5..19bd1c5a25094ac5c205be1820cc663784123d83 100644 (file)
--- a/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c
@@ -240,7 +240,6 @@ PcieLinkSafeMode (
   IN      PCIe_PLATFORM_CONFIG  *Pcie
   )
 {
-  Engine->Type.Port.PortData.LinkSpeedCapability = PcieGen1;
   PcieSetLinkSpeedCap (PcieGen1, Engine, Pcie);
   PciePortRegisterRMW (
     Engine,