spartan3e: rx_test
[hwmod.git] / src / scanner.vhd
index fde57048fe8c8da0aea576b2be3425ffba88eafb..018677c58b8e581d51992ce8bbe2a22b0fd43d25 100644 (file)
@@ -21,12 +21,16 @@ entity scanner is
                finished : in std_logic;
                -- test: uart-tx
                tx_data : out std_logic_vector(7 downto 0);
-               tx_new : out std_logic
+               tx_new : out std_logic;
+               -- test: uart_rx
+               rx_data : in std_logic_vector(7 downto 0);
+               rx_new : in std_logic
        );
 end entity scanner;
 
 architecture beh of scanner is
-       type SCANNER_STATE is (SIDLE, SIGNORE_NEXT, SREAD_NEXT, STAKE, SDEL, SENTER);
+       type SCANNER_STATE is (SIDLE, SIGNORE_NEXT, SREAD_NEXT, STAKE, SDEL, SENTER,
+               STAKE_RS232);
        signal state_int, state_next : SCANNER_STATE;
        signal s_char_int, s_char_next : hbyte;
        signal s_take_int, s_take_next : std_logic;
@@ -97,6 +101,9 @@ begin
                                                when others => state_next <= SIDLE;
                                        end case;
                                end if;
+                               if rx_new = '1' then
+                                       state_next <= STAKE_RS232;
+                               end if;
                        when SIGNORE_NEXT =>
                                if new_data = '1' then
                                        state_next <= SIDLE;
@@ -113,7 +120,7 @@ begin
                                                when others => state_next <= SIDLE;
                                        end case;
                                end if;
-                       when STAKE | SDEL=>
+                       when STAKE | SDEL | STAKE_RS232=>
                                if s_done = '1' then
                                        state_next <= SIDLE;
                                end if;
@@ -127,7 +134,7 @@ begin
        end process;
 
        -- out
-       process(state_int, data, s_char_int, new_data)
+       process(state_int, data, s_char_int, new_data, rx_data)
                function sc2ascii (x : hbyte) return hbyte is
                        variable y : hbyte;
                begin
@@ -164,6 +171,13 @@ begin
                        when STAKE =>
                                s_take_next <= '1';
                                s_char_next <= sc2ascii(hbyte(data));
+                       when STAKE_RS232 =>
+                               s_take_next <= '1';
+                               if rx_data >= x"30" and rx_data <= x"39" then
+                                       s_char_next <= hbyte(rx_data);
+                               else
+                                       s_char_next <= x"41";
+                               end if;
                        when SDEL =>
                                s_take_next <= '1';
                                s_backspace_next <= '1';