Move the v3 resource allocator to v2.
[coreboot.git] / src / northbridge / intel / i82830 / northbridge.c
index 9f6ba71d41ff1ceb1a1f364e574d5a73922c90b7..2b913ea2877d2e20d569c5482a33ae0c65b47798 100644 (file)
@@ -51,25 +51,6 @@ static struct pci_driver northbridge_driver __pci_driver = {
        .device = 0x3575,
 };
 
-#define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
-
-static void pci_domain_read_resources(device_t dev)
-{
-       struct resource *resource;
-
-       /* Initialize the system wide I/O space constraints. */
-       resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
-       resource->limit = 0xffffUL;
-       resource->flags =
-           IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-
-       /* Initialize the system wide memory resources constraints. */
-       resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
-       resource->limit = 0xffffffffULL;
-       resource->flags =
-           IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
-}
-
 static void ram_resource(device_t dev, unsigned long index,
                         unsigned long basek, unsigned long sizek)
 {
@@ -158,12 +139,6 @@ static void pci_domain_set_resources(device_t dev)
        assign_resources(&dev->link[0]);
 }
 
-static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
-{
-       max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
-       return max;
-}
-
 static struct device_operations pci_domain_ops = {
        .read_resources         = pci_domain_read_resources,
        .set_resources          = pci_domain_set_resources,