AMD F14 southbridge update

[coreboot.git] / src / northbridge / amd / amdfam10 / northbridge.c

diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index c64747403d7d2eb891ae0f64b52f83f8763dcc4b..89bd6733ce26e85821901981f28a17976b7b820e 100644 (file)
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -47,6 +47,9 @@
 #endif
 
 #include <cpu/amd/amdfam10_sysconf.h>
+#if CONFIG_AMD_SB_CIMX
+#include <sb_cimx.h>
+#endif
 
 struct amdfam10_sysconf_t sysconf;
 
@@ -1445,6 +1448,10 @@ static u32 cpu_bus_scan(device_t dev, u32 max)
 static void cpu_bus_init(device_t dev)
 {
        initialize_cpus(dev->link_list);
+#if CONFIG_AMD_SB_CIMX
+       sb_After_Pci_Init();
+       sb_Mid_Post_Init();
+#endif
 }
 
 static void cpu_bus_noop(device_t dev)