Unify DIMM SPD addressing. For Geode, change the

[coreboot.git] / src / mainboard / amd / pistachio / romstage.c

diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c
index 740b148f7e51efb48e3c5e875681c84cc4e112f0..f1f61c3d0cbcd71e895ee68fa37254fa42ae9981 100644 (file)
--- a/src/mainboard/amd/pistachio/romstage.c
+++ b/src/mainboard/amd/pistachio/romstage.c
@@ -17,9 +17,6 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-#define DIMM0 0x50
-#define DIMM1 0x51
-
 #include <stdint.h>
 #include <string.h>
 #include <device/pci_def.h>
@@ -39,6 +36,7 @@
 #include "northbridge/amd/amdk8/reset_test.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
 #include <usbdebug.h>
+#include <spd.h>
 
 #include "cpu/x86/mtrr/earlymtrr.c"
 #include "cpu/x86/bist.h"