vgabios: Move vbe code from vgabios.c to new file vbe.c.

[seabios.git] / vgasrc / vgaio.c

diff --git a/vgasrc/vgaio.c b/vgasrc/vgaio.c
index d341b89ab114443d97b9fd47e7b7803d9fad2c99..bc4c9683756928067d7a2c872f392a4807e68cfc 100644 (file)
--- a/vgasrc/vgaio.c
+++ b/vgasrc/vgaio.c
@@ -8,7 +8,7 @@
 #include "ioport.h" // outb
 #include "farptr.h" // SET_FARVAR
 #include "biosvar.h" // GET_BDA
-#include "vgatables.h" // VGAREG_*
+#include "vgabios.h" // VGAREG_*
 
 // TODO
 //  * replace direct in/out calls with wrapper functions
@@ -19,14 +19,14 @@
  ****************************************************************/
 
 void
-vgahw_screen_disable()
+vgahw_screen_disable(void)
 {
     inb(VGAREG_ACTL_RESET);
     outb(0x00, VGAREG_ACTL_ADDRESS);
 }
 
 void
-vgahw_screen_enable()
+vgahw_screen_enable(void)
 {
     inb(VGAREG_ACTL_RESET);
     outb(0x20, VGAREG_ACTL_ADDRESS);
@@ -65,7 +65,7 @@ vgahw_set_overscan_border_color(u8 color)
 }
 
 u8
-vgahw_get_overscan_border_color()
+vgahw_get_overscan_border_color(void)
 {
     inb(VGAREG_ACTL_RESET);
     outb(0x11, VGAREG_ACTL_ADDRESS);
@@ -240,7 +240,7 @@ vgahw_set_pel_mask(u8 val)
 }
 
 u8
-vgahw_get_pel_mask()
+vgahw_get_pel_mask(void)
 {
     return inb(VGAREG_PEL_MASK);
 }
@@ -288,7 +288,7 @@ vgahw_set_text_block_specifier(u8 spec)
 }
 
 void
-get_font_access()
+get_font_access(void)
 {
     outw(0x0100, VGAREG_SEQU_ADDRESS);
     outw(0x0402, VGAREG_SEQU_ADDRESS);
@@ -300,7 +300,7 @@ get_font_access()
 }
 
 void
-release_font_access()
+release_font_access(void)
 {
     outw(0x0100, VGAREG_SEQU_ADDRESS);
     outw(0x0302, VGAREG_SEQU_ADDRESS);
@@ -318,7 +318,7 @@ release_font_access()
  ****************************************************************/
 
 static u16
-get_crtc()
+get_crtc(void)
 {
     return GET_BDA(crtc_address);
 }
@@ -365,7 +365,7 @@ vgahw_set_scan_lines(u8 lines)
 
 // Get vertical display end
 u16
-vgahw_get_vde()
+vgahw_get_vde(void)
 {
     u16 crtc_addr = get_crtc();
     outb(0x12, crtc_addr);
@@ -481,16 +481,17 @@ vgahw_restore_state(u16 seg, struct saveVideoHardware *info)
 }
 
 void
-vgahw_set_mode(struct VideoParam_s *vparam_g)
+vgahw_set_mode(struct vgamode_s *vmode_g)
 {
     // Reset Attribute Ctl flip-flop
     inb(VGAREG_ACTL_RESET);
 
     // Set Attribute Ctl
+    u8 *regs = GET_GLOBAL(vmode_g->actl_regs);
     u16 i;
     for (i = 0; i <= 0x13; i++) {
         outb(i, VGAREG_ACTL_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->actl_regs[i]), VGAREG_ACTL_WRITE_DATA);
+        outb(GET_GLOBAL(regs[i]), VGAREG_ACTL_WRITE_DATA);
     }
     outb(0x14, VGAREG_ACTL_ADDRESS);
     outb(0x00, VGAREG_ACTL_WRITE_DATA);
@@ -498,19 +499,21 @@ vgahw_set_mode(struct VideoParam_s *vparam_g)
     // Set Sequencer Ctl
     outb(0, VGAREG_SEQU_ADDRESS);
     outb(0x03, VGAREG_SEQU_DATA);
+    regs = GET_GLOBAL(vmode_g->sequ_regs);
     for (i = 1; i <= 4; i++) {
         outb(i, VGAREG_SEQU_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->sequ_regs[i - 1]), VGAREG_SEQU_DATA);
+        outb(GET_GLOBAL(regs[i - 1]), VGAREG_SEQU_DATA);
     }
 
     // Set Grafx Ctl
+    regs = GET_GLOBAL(vmode_g->grdc_regs);
     for (i = 0; i <= 8; i++) {
         outb(i, VGAREG_GRDC_ADDRESS);
-        outb(GET_GLOBAL(vparam_g->grdc_regs[i]), VGAREG_GRDC_DATA);
+        outb(GET_GLOBAL(regs[i]), VGAREG_GRDC_DATA);
     }
 
     // Set CRTC address VGA or MDA
-    u8 miscreg = GET_GLOBAL(vparam_g->miscreg);
+    u8 miscreg = GET_GLOBAL(vmode_g->miscreg);
     u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
     if (!(miscreg & 1))
         crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
@@ -518,9 +521,10 @@ vgahw_set_mode(struct VideoParam_s *vparam_g)
     // Disable CRTC write protection
     outw(0x0011, crtc_addr);
     // Set CRTC regs
+    regs = GET_GLOBAL(vmode_g->crtc_regs);
     for (i = 0; i <= 0x18; i++) {
         outb(i, crtc_addr);
-        outb(GET_GLOBAL(vparam_g->crtc_regs[i]), crtc_addr + 1);
+        outb(GET_GLOBAL(regs[i]), crtc_addr + 1);
     }
 
     // Set the misc register
@@ -545,7 +549,7 @@ vgahw_enable_video_addressing(u8 disable)
 }
 
 void
-vgahw_init()
+vgahw_init(void)
 {
     // switch to color mode and enable CPU access 480 lines
     outb(0xc3, VGAREG_WRITE_MISC_OUTPUT);