#include "bregs.h" // struct bregs
#include "biosvar.h" // GET_BDA
#include "util.h" // memset
-#include "vgabios.h" // find_vga_entry
+#include "vgabios.h" // calc_page_size
#include "optionroms.h" // struct pci_data
#include "config.h" // CONFIG_*
-#include "stdvga.h" // stdvga_set_mode
-#include "geodelx.h" // geodelx_init
-#include "bochsvga.h" // bochsvga_init
+#include "stdvga.h" // stdvga_set_cursor_shape
+#include "clext.h" // clext_1012
+#include "vgahw.h" // vgahw_set_mode
// XXX
#define DEBUG_VGA_POST 1
* Helper functions
****************************************************************/
+u16
+calc_page_size(u8 memmodel, u16 width, u16 height)
+{
+ switch (memmodel) {
+ case MM_TEXT:
+ return ALIGN(width * height * 2, 2*1024);
+ case MM_CGA:
+ return 16*1024;
+ default:
+ return ALIGN(width * height / 8, 8*1024);
+ }
+}
+
static void
set_cursor_shape(u8 start, u8 end)
{
if (cp.page != current)
return;
- // Get the dimensions
+ // Calculate the memory address
u16 nbcols = GET_BDA(video_cols);
- u16 nbrows = GET_BDA(video_rows) + 1;
-
- // Calculate the address knowing nbcols nbrows and page num
- u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
- + cp.x + cp.y * nbcols);
+ u16 address = (GET_BDA(video_pagesize) * cp.page
+ + (cp.x + cp.y * nbcols) * 2);
- stdvga_set_cursor_pos(address);
+ stdvga_set_cursor_pos(address / 2);
}
static struct cursorpos
return;
// Get the mode
- struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
+ struct vgamode_s *vmode_g = vgahw_find_mode(GET_BDA(video_mode));
if (!vmode_g)
return;
// Get pos curs pos for the right page
struct cursorpos cp = get_cursor_pos(page);
- u16 address;
- if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
- // Get the dimensions
- u16 nbcols = GET_BDA(video_cols);
- u16 nbrows = GET_BDA(video_rows) + 1;
-
- // Calculate the address knowing nbcols nbrows and page num
- address = SCREEN_MEM_START(nbcols, nbrows, page);
- SET_BDA(video_pagestart, address);
-
- // Start address
- address = SCREEN_IO_START(nbcols, nbrows, page);
- } else {
- address = page * GET_GLOBAL(vmode_g->slength);
- }
-
- stdvga_set_active_page(address);
+ // Calculate memory address of start of page
+ u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
+ u16 address = GET_BDA(video_pagesize) * page;
+ stdvga_set_active_page(memmodel == MM_TEXT ? address / 2 : address);
// And change the BIOS page
+ SET_BDA(video_pagestart, address);
SET_BDA(video_page, page);
dprintf(1, "Set active page %02x address %04x\n", page, address);
u8 rows = vde / lines;
SET_BDA(video_rows, rows - 1);
u16 cols = GET_BDA(video_cols);
- SET_BDA(video_pagesize, rows * cols * 2);
+ SET_BDA(video_pagesize, calc_page_size(MM_TEXT, cols, rows));
}
modeswitch_set_bda(int mode, int flags, struct vgamode_s *vmode_g)
{
// Set the BIOS mem
- u16 cheight = GET_GLOBAL(vmode_g->cheight);
+ int width = GET_GLOBAL(vmode_g->width);
+ int height = GET_GLOBAL(vmode_g->height);
+ u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
+ int cheight = GET_GLOBAL(vmode_g->cheight);
SET_BDA(video_mode, mode);
- SET_BDA(video_cols, GET_GLOBAL(vmode_g->twidth));
- SET_BDA(video_pagesize, GET_GLOBAL(vmode_g->slength));
+ if (memmodel == MM_TEXT) {
+ SET_BDA(video_cols, width);
+ SET_BDA(video_rows, height-1);
+ SET_BDA(cursor_type, 0x0607);
+ } else {
+ int cwidth = GET_GLOBAL(vmode_g->cwidth);
+ SET_BDA(video_cols, width / cwidth);
+ SET_BDA(video_rows, (height / cheight) - 1);
+ SET_BDA(cursor_type, 0x0000);
+ }
+ SET_BDA(video_pagesize, calc_page_size(memmodel, width, height));
SET_BDA(crtc_address, stdvga_get_crtc());
- SET_BDA(video_rows, GET_GLOBAL(vmode_g->theight)-1);
SET_BDA(char_height, cheight);
SET_BDA(video_ctl, 0x60 | (flags & MF_NOCLEARMEM ? 0x80 : 0x00));
SET_BDA(video_switches, 0xF9);
SET_BDA(modeset_ctl, GET_BDA(modeset_ctl) & 0x7f);
- SET_BDA(cursor_type, GET_GLOBAL(vmode_g->memmodel) & TEXT ? 0x0607 : 0x0000);
int i;
for (i=0; i<8; i++)
SET_BDA(cursor_pos[i], 0x0000);
static void
handle_1000(struct bregs *regs)
{
- u8 noclearmem = regs->al & 0x80;
- u8 mode = regs->al & 0x7f;
+ int mode = regs->al & 0x7f;
// Set regs->al
if (mode > 7)
else
regs->al = 0x30;
- if (CONFIG_VGA_CIRRUS) {
- int ret = cirrus_set_video_mode(mode, noclearmem);
- if (ret)
- return;
- }
-
- if (bochsvga_enabled())
- bochsvga_hires_enable(0);
-
int flags = GET_BDA(modeset_ctl) & (MF_NOPALETTE|MF_GRAYSUM);
- if (noclearmem)
+ if (regs->al & 0x80)
flags |= MF_NOCLEARMEM;
- stdvga_set_mode(mode, flags);
+ vgahw_set_mode(mode, flags);
}
static void
{
if (regs->bl > 0x14)
return;
- stdvga_set_single_palette_reg(regs->bl, regs->bh);
+ stdvga_attr_write(regs->bl, regs->bh);
}
static void
{
if (regs->bl > 0x14)
return;
- regs->bh = stdvga_get_single_palette_reg(regs->bl);
+ regs->bh = stdvga_attr_read(regs->bl);
}
static void
handle_101010(struct bregs *regs)
{
u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
- stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_write(GET_SEG(SS), rgb, regs->bx, 1);
}
static void
handle_101012(struct bregs *regs)
{
- stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_write(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101015(struct bregs *regs)
{
u8 rgb[3];
- stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_read(GET_SEG(SS), rgb, regs->bx, 1);
regs->dh = rgb[0];
regs->ch = rgb[1];
regs->cl = rgb[2];
static void
handle_101017(struct bregs *regs)
{
- stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_read(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101018(struct bregs *regs)
{
- stdvga_set_pel_mask(regs->bl);
+ stdvga_pelmask_write(regs->bl);
}
static void
handle_101019(struct bregs *regs)
{
- regs->bl = stdvga_get_pel_mask();
+ regs->bl = stdvga_pelmask_read();
}
static void
static void
handle_1012(struct bregs *regs)
{
+ if (CONFIG_VGA_CIRRUS && regs->bl >= 0x80) {
+ clext_1012(regs);
+ return;
+ }
+
switch (regs->bl) {
case 0x10: handle_101210(regs); break;
case 0x30: handle_101230(regs); break;
case 0x36: handle_101236(regs); break;
default: handle_1012XX(regs); break;
}
-
- // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
}
SET_BDA(video_msr, 0x09);
}
+u16 VgaBDF VAR16;
+
void VISIBLE16
vga_post(struct bregs *regs)
{
debug_enter(regs, DEBUG_VGA_POST);
- stdvga_init();
+ SET_VGA(VgaBDF, regs->ax);
- if (CONFIG_VGA_GEODELX)
- geodelx_init();
+ int ret = vgahw_init();
+ if (ret) {
+ dprintf(1, "Failed to initialize VGA hardware. Exiting.\n");
+ return;
+ }
init_bios_area();
- bochsvga_init(regs->ah, regs->al);
+ build_video_param();
extern void entry_10(void);
SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10));
- if (CONFIG_VGA_CIRRUS)
- cirrus_init();
-
// XXX - clear screen and display info
- build_video_param();
-
// Fixup checksum
extern u8 _rom_header_size, _rom_header_checksum;
SET_VGA(_rom_header_checksum, 0);
projects / seabios.git / blobdiff