#include "bregs.h" // struct bregs
#include "biosvar.h" // GET_BDA
#include "util.h" // memset
-#include "vgabios.h" // find_vga_entry
+#include "vgabios.h" // calc_page_size
#include "optionroms.h" // struct pci_data
#include "config.h" // CONFIG_*
-#include "stdvga.h" // stdvga_set_mode
-#include "geodevga.h" // geodevga_init
-#include "bochsvga.h" // bochsvga_init
-#include "clext.h" // clext_init
+#include "stdvga.h" // stdvga_set_cursor_shape
+#include "clext.h" // clext_1012
#include "vgahw.h" // vgahw_set_mode
// XXX
return;
// Get the mode
- struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
+ struct vgamode_s *vmode_g = vgahw_find_mode(GET_BDA(video_mode));
if (!vmode_g)
return;
{
if (regs->bl > 0x14)
return;
- stdvga_set_single_palette_reg(regs->bl, regs->bh);
+ stdvga_attr_write(regs->bl, regs->bh);
}
static void
{
if (regs->bl > 0x14)
return;
- regs->bh = stdvga_get_single_palette_reg(regs->bl);
+ regs->bh = stdvga_attr_read(regs->bl);
}
static void
handle_101010(struct bregs *regs)
{
u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
- stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_write(GET_SEG(SS), rgb, regs->bx, 1);
}
static void
handle_101012(struct bregs *regs)
{
- stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_write(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101015(struct bregs *regs)
{
u8 rgb[3];
- stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_read(GET_SEG(SS), rgb, regs->bx, 1);
regs->dh = rgb[0];
regs->ch = rgb[1];
regs->cl = rgb[2];
static void
handle_101017(struct bregs *regs)
{
- stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_read(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101018(struct bregs *regs)
{
- stdvga_set_pel_mask(regs->bl);
+ stdvga_pelmask_write(regs->bl);
}
static void
handle_101019(struct bregs *regs)
{
- regs->bl = stdvga_get_pel_mask();
+ regs->bl = stdvga_pelmask_read();
}
static void
static void
handle_1012(struct bregs *regs)
{
+ if (CONFIG_VGA_CIRRUS && regs->bl >= 0x80) {
+ clext_1012(regs);
+ return;
+ }
+
switch (regs->bl) {
case 0x10: handle_101210(regs); break;
case 0x30: handle_101230(regs); break;
case 0x36: handle_101236(regs); break;
default: handle_1012XX(regs); break;
}
-
- // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
}