#include "vgabios.h" // find_vga_entry
#include "optionroms.h" // struct pci_data
#include "config.h" // CONFIG_*
-#include "vbe.h" // struct vbe_info
+#include "stdvga.h" // stdvga_screen_disable
#include "geodelx.h" // geodelx_init
#include "bochsvga.h" // bochsvga_init
static void
perform_gray_scale_summing(u16 start, u16 count)
{
- vgahw_screen_disable();
+ stdvga_screen_disable();
int i;
for (i = start; i < start+count; i++) {
u8 rgb[3];
- vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
+ stdvga_get_dac_regs(GET_SEG(SS), rgb, i, 1);
// intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
if (intensity > 0x3f)
intensity = 0x3f;
- vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
+ stdvga_set_dac_regs(GET_SEG(SS), rgb, i, 1);
}
- vgahw_screen_enable();
+ stdvga_screen_enable();
}
static void
start = ((end + 1) * cheight / 8) - 2;
end = ((end + 1) * cheight / 8) - 1;
}
- vgahw_set_cursor_shape(start, end);
+ stdvga_set_cursor_shape(start, end);
}
static u16
u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
+ cp.x + cp.y * nbcols);
- vgahw_set_cursor_pos(address);
+ stdvga_set_cursor_pos(address);
}
static struct cursorpos
address = page * GET_GLOBAL(vmode_g->slength);
}
- vgahw_set_active_page(address);
+ stdvga_set_active_page(address);
// And change the BIOS page
SET_BDA(video_page, page);
static void
set_scan_lines(u8 lines)
{
- vgahw_set_scan_lines(lines);
+ stdvga_set_scan_lines(lines);
if (lines == 8)
set_cursor_shape(0x06, 0x07);
else
set_cursor_shape(lines - 4, lines - 3);
SET_BDA(char_height, lines);
- u16 vde = vgahw_get_vde();
+ u16 vde = stdvga_get_vde();
u8 rows = vde / lines;
SET_BDA(video_rows, rows - 1);
u16 cols = GET_BDA(video_cols);
// if palette loading (bit 3 of modeset ctl = 0)
if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
- vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
+ stdvga_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
// From which palette
u8 *palette_g = GET_GLOBAL(vmode_g->dac);
u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
// Always 256*3 values
- vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
+ stdvga_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
u16 i;
for (i = palsize; i < 0x0100; i++) {
static u8 rgb[3] VAR16;
- vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
+ stdvga_set_dac_regs(get_global_seg(), rgb, i, 1);
}
if ((modeset_ctl & 0x02) == 0x02)
perform_gray_scale_summing(0x00, 0x100);
}
- vgahw_set_mode(vmode_g);
+ stdvga_set_mode(vmode_g);
if (noclearmem == 0x00)
clear_screen(vmode_g);
static void
handle_100b00(struct bregs *regs)
{
- vgahw_set_border_color(regs->bl);
+ stdvga_set_border_color(regs->bl);
}
static void
handle_100b01(struct bregs *regs)
{
- vgahw_set_palette(regs->bl);
+ stdvga_set_palette(regs->bl);
}
static void
{
if (regs->bl > 0x14)
return;
- vgahw_set_single_palette_reg(regs->bl, regs->bh);
+ stdvga_set_single_palette_reg(regs->bl, regs->bh);
}
static void
handle_101001(struct bregs *regs)
{
- vgahw_set_overscan_border_color(regs->bh);
+ stdvga_set_overscan_border_color(regs->bh);
}
static void
handle_101002(struct bregs *regs)
{
- vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
+ stdvga_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
}
static void
handle_101003(struct bregs *regs)
{
- vgahw_toggle_intensity(regs->bl);
+ stdvga_toggle_intensity(regs->bl);
}
static void
{
if (regs->bl > 0x14)
return;
- regs->bh = vgahw_get_single_palette_reg(regs->bl);
+ regs->bh = stdvga_get_single_palette_reg(regs->bl);
}
static void
handle_101008(struct bregs *regs)
{
- regs->bh = vgahw_get_overscan_border_color();
+ regs->bh = stdvga_get_overscan_border_color();
}
static void
handle_101009(struct bregs *regs)
{
- vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
+ stdvga_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
}
static void noinline
handle_101010(struct bregs *regs)
{
u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
- vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
}
static void
handle_101012(struct bregs *regs)
{
- vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101013(struct bregs *regs)
{
- vgahw_select_video_dac_color_page(regs->bl, regs->bh);
+ stdvga_select_video_dac_color_page(regs->bl, regs->bh);
}
static void noinline
handle_101015(struct bregs *regs)
{
u8 rgb[3];
- vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
regs->dh = rgb[0];
regs->ch = rgb[1];
regs->cl = rgb[2];
static void
handle_101017(struct bregs *regs)
{
- vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101018(struct bregs *regs)
{
- vgahw_set_pel_mask(regs->bl);
+ stdvga_set_pel_mask(regs->bl);
}
static void
handle_101019(struct bregs *regs)
{
- regs->bl = vgahw_get_pel_mask();
+ regs->bl = stdvga_get_pel_mask();
}
static void
handle_10101a(struct bregs *regs)
{
- vgahw_read_video_dac_state(®s->bl, ®s->bh);
+ stdvga_read_video_dac_state(®s->bl, ®s->bh);
}
static void
static void
handle_101103(struct bregs *regs)
{
- vgahw_set_text_block_specifier(regs->bl);
+ stdvga_set_text_block_specifier(regs->bl);
}
static void
static void
handle_101232(struct bregs *regs)
{
- vgahw_enable_video_addressing(regs->al);
+ stdvga_enable_video_addressing(regs->al);
regs->al = 0x12;
}
u16 seg = regs->es;
void *data = (void*)(regs->bx+0);
if (flags & 1) {
- vgahw_save_state(seg, data);
+ stdvga_save_state(seg, data);
data += sizeof(struct saveVideoHardware);
}
if (flags & 2) {
data += sizeof(struct saveBDAstate);
}
if (flags & 4)
- vgahw_save_dac_state(seg, data);
+ stdvga_save_dac_state(seg, data);
regs->al = 0x1c;
}
u16 seg = regs->es;
void *data = (void*)(regs->bx+0);
if (flags & 1) {
- vgahw_restore_state(seg, data);
+ stdvga_restore_state(seg, data);
data += sizeof(struct saveVideoHardware);
}
if (flags & 2) {
data += sizeof(struct saveBDAstate);
}
if (flags & 4)
- vgahw_restore_dac_state(seg, data);
+ stdvga_restore_dac_state(seg, data);
regs->al = 0x1c;
}
}
}
-static void
-handle_104f00(struct bregs *regs)
-{
- u16 seg = regs->es;
- struct vbe_info *info = (void*)(regs->di+0);
-
- if (GET_FARVAR(seg, info->signature) == VBE2_SIGNATURE) {
- dprintf(4, "Get VBE Controller: VBE2 Signature found\n");
- } else if (GET_FARVAR(seg, info->signature) == VESA_SIGNATURE) {
- dprintf(4, "Get VBE Controller: VESA Signature found\n");
- } else {
- dprintf(4, "Get VBE Controller: Invalid Signature\n");
- }
-
- memset_far(seg, info, 0, sizeof(*info));
-
- SET_FARVAR(seg, info->signature, VESA_SIGNATURE);
-
- SET_FARVAR(seg, info->version, 0x0200);
-
- SET_FARVAR(seg, info->oem_string,
- SEGOFF(get_global_seg(), (u32)VBE_OEM_STRING));
- SET_FARVAR(seg, info->capabilities, 0x1); /* 8BIT DAC */
-
- /* We generate our mode list in the reserved field of the info block */
- SET_FARVAR(seg, info->video_mode, SEGOFF(seg, regs->di + 34));
-
- /* Total memory (in 64 blocks) */
- SET_FARVAR(seg, info->total_memory, bochsvga_total_mem());
-
- SET_FARVAR(seg, info->oem_vendor_string,
- SEGOFF(get_global_seg(), (u32)VBE_VENDOR_STRING));
- SET_FARVAR(seg, info->oem_product_string,
- SEGOFF(get_global_seg(), (u32)VBE_PRODUCT_STRING));
- SET_FARVAR(seg, info->oem_revision_string,
- SEGOFF(get_global_seg(), (u32)VBE_REVISION_STRING));
-
- /* Fill list of modes */
- bochsvga_list_modes(seg, regs->di + 32);
-
- regs->al = regs->ah; /* 0x4F, Function supported */
- regs->ah = 0x0; /* 0x0, Function call successful */
-}
-
-static void
-handle_104f01(struct bregs *regs)
-{
- u16 seg = regs->es;
- struct vbe_mode_info *info = (void*)(regs->di+0);
- u16 mode = regs->cx;
- struct vbe_modeinfo modeinfo;
- int rc;
-
- dprintf(1, "VBE mode info request: %x\n", mode);
-
- rc = bochsvga_mode_info(mode, &modeinfo);
- if (rc) {
- dprintf(1, "VBE mode %x not found\n", mode);
- regs->ax = 0x100;
- return;
- }
-
- u16 mode_attr = VBE_MODE_ATTRIBUTE_SUPPORTED |
- VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE |
- VBE_MODE_ATTRIBUTE_COLOR_MODE |
- VBE_MODE_ATTRIBUTE_GRAPHICS_MODE;
- if (modeinfo.depth == 4)
- mode_attr |= VBE_MODE_ATTRIBUTE_TTY_BIOS_SUPPORT;
- else
- mode_attr |= VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE;
- SET_FARVAR(seg, info->mode_attributes, mode_attr);
- SET_FARVAR(seg, info->winA_attributes,
- VBE_WINDOW_ATTRIBUTE_RELOCATABLE |
- VBE_WINDOW_ATTRIBUTE_READABLE |
- VBE_WINDOW_ATTRIBUTE_WRITEABLE);
- SET_FARVAR(seg, info->winB_attributes, 0);
- SET_FARVAR(seg, info->win_granularity, 64); /* Bank size 64K */
- SET_FARVAR(seg, info->win_size, 64); /* Bank size 64K */
- SET_FARVAR(seg, info->winA_seg, 0xA000);
- SET_FARVAR(seg, info->winB_seg, 0x0);
- SET_FARVAR(seg, info->win_func_ptr.segoff, 0x0);
- SET_FARVAR(seg, info->bytes_per_scanline, modeinfo.linesize);
- SET_FARVAR(seg, info->xres, modeinfo.width);
- SET_FARVAR(seg, info->yres, modeinfo.height);
- SET_FARVAR(seg, info->xcharsize, 8);
- SET_FARVAR(seg, info->ycharsize, 16);
- if (modeinfo.depth == 4)
- SET_FARVAR(seg, info->planes, 4);
- else
- SET_FARVAR(seg, info->planes, 1);
- SET_FARVAR(seg, info->bits_per_pixel, modeinfo.depth);
- SET_FARVAR(seg, info->banks,
- (modeinfo.linesize * modeinfo.height + 65535) / 65536);
- if (modeinfo.depth == 4)
- SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PLANAR);
- else if (modeinfo.depth == 8)
- SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PACKED_PIXEL);
- else
- SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_DIRECT_COLOR);
- SET_FARVAR(seg, info->bank_size, 0);
- u32 pages = modeinfo.vram_size / (modeinfo.height * modeinfo.linesize);
- if (modeinfo.depth == 4)
- SET_FARVAR(seg, info->pages, (pages / 4) - 1);
- else
- SET_FARVAR(seg, info->pages, pages - 1);
- SET_FARVAR(seg, info->reserved0, 1);
-
- u8 r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
-
- switch (modeinfo.depth) {
- case 15: r_size = 5; r_pos = 10; g_size = 5; g_pos = 5;
- b_size = 5; b_pos = 0; a_size = 1; a_pos = 15; break;
- case 16: r_size = 5; r_pos = 11; g_size = 6; g_pos = 5;
- b_size = 5; b_pos = 0; a_size = 0; a_pos = 0; break;
- case 24: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
- b_size = 8; b_pos = 0; a_size = 0; a_pos = 0; break;
- case 32: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
- b_size = 8; b_pos = 0; a_size = 8; a_pos = 24; break;
- default: r_size = 0; r_pos = 0; g_size = 0; g_pos = 0;
- b_size = 0; b_pos = 0; a_size = 0; a_pos = 0; break;
- }
-
- SET_FARVAR(seg, info->red_size, r_size);
- SET_FARVAR(seg, info->red_pos, r_pos);
- SET_FARVAR(seg, info->green_size, g_size);
- SET_FARVAR(seg, info->green_pos, g_pos);
- SET_FARVAR(seg, info->blue_size, b_size);
- SET_FARVAR(seg, info->blue_pos, b_pos);
- SET_FARVAR(seg, info->alpha_size, a_size);
- SET_FARVAR(seg, info->alpha_pos, a_pos);
-
- if (modeinfo.depth == 32)
- SET_FARVAR(seg, info->directcolor_info,
- VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE);
- else
- SET_FARVAR(seg, info->directcolor_info, 0);
-
- if (modeinfo.depth > 4)
- SET_FARVAR(seg, info->phys_base, modeinfo.phys_base);
- else
- SET_FARVAR(seg, info->phys_base, 0);
-
- SET_FARVAR(seg, info->reserved1, 0);
- SET_FARVAR(seg, info->reserved2, 0);
- SET_FARVAR(seg, info->linear_bytes_per_scanline, modeinfo.linesize);
- SET_FARVAR(seg, info->bank_pages, 0);
- SET_FARVAR(seg, info->linear_pages, 0);
- SET_FARVAR(seg, info->linear_red_size, r_size);
- SET_FARVAR(seg, info->linear_red_pos, r_pos);
- SET_FARVAR(seg, info->linear_green_size, g_size);
- SET_FARVAR(seg, info->linear_green_pos, g_pos);
- SET_FARVAR(seg, info->linear_blue_size, b_size);
- SET_FARVAR(seg, info->linear_blue_pos, b_pos);
- SET_FARVAR(seg, info->linear_alpha_size, a_size);
- SET_FARVAR(seg, info->linear_alpha_pos, a_pos);
- SET_FARVAR(seg, info->pixclock_max, 0);
-
- regs->al = regs->ah; /* 0x4F, Function supported */
- regs->ah = 0x0; /* 0x0, Function call successful */
-}
-
-static void
-handle_104f02(struct bregs *regs)
-{
- //u16 seg = regs->es;
- //struct vbe_crtc_info *crtc_info = (void*)(regs->di+0);
- u16 mode = regs->bx;
- struct vbe_modeinfo modeinfo;
- int rc;
-
- dprintf(1, "VBE mode set: %x\n", mode);
-
- if (mode < 0x100) { /* VGA */
- dprintf(1, "set VGA mode %x\n", mode);
-
- bochsvga_hires_enable(0);
- vga_set_mode(mode, 0);
- } else { /* VBE */
- rc = bochsvga_mode_info(mode & 0x1ff, &modeinfo);
- if (rc) {
- dprintf(1, "VBE mode %x not found\n", mode & 0x1ff);
- regs->ax = 0x100;
- return;
- }
- bochsvga_hires_enable(1);
- bochsvga_set_mode(mode & 0x1ff, &modeinfo);
-
- if (mode & 0x4000) {
- /* Linear frame buffer */
- /* XXX: ??? */
- }
- if (!(mode & 0x8000)) {
- bochsvga_clear_scr();
- }
- }
-
- regs->al = regs->ah; /* 0x4F, Function supported */
- regs->ah = 0x0; /* 0x0, Function call successful */
-}
-
-static void
-handle_104f03(struct bregs *regs)
-{
- if (!bochsvga_hires_enabled()) {
- regs->bx = GET_BDA(video_mode);
- } else {
- regs->bx = bochsvga_curr_mode();
- }
-
- dprintf(1, "VBE current mode=%x\n", regs->bx);
-
- regs->al = regs->ah; /* 0x4F, Function supported */
- regs->ah = 0x0; /* 0x0, Function call successful */
-}
-
-static void
-handle_104f04(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f05(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f06(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f07(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f08(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f0a(struct bregs *regs)
-{
- debug_enter(regs, DEBUG_VGA_10);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104fXX(struct bregs *regs)
-{
- debug_stub(regs);
- regs->ax = 0x0100;
-}
-
-static void
-handle_104f(struct bregs *regs)
-{
- if (!bochsvga_enabled()) {
- handle_104fXX(regs);
- return;
- }
-
- switch (regs->al) {
- case 0x00: handle_104f00(regs); break;
- case 0x01: handle_104f01(regs); break;
- case 0x02: handle_104f02(regs); break;
- case 0x03: handle_104f03(regs); break;
- case 0x04: handle_104f04(regs); break;
- case 0x05: handle_104f05(regs); break;
- case 0x06: handle_104f06(regs); break;
- case 0x07: handle_104f07(regs); break;
- case 0x08: handle_104f08(regs); break;
- case 0x0a: handle_104f0a(regs); break;
- default: handle_104fXX(regs); break;
- }
-}
-
-
static void
handle_10XX(struct bregs *regs)
{
{
debug_enter(regs, DEBUG_VGA_POST);
- vgahw_init();
+ stdvga_init();
if (CONFIG_VGA_GEODELX)
geodelx_init();
projects / seabios.git / blobdiff