-#include "vgatables.h"
-#include "vbe.h"
-#include "dispi.h"
-#include "util.h"
-#include "config.h" // CONFIG_
-#include "biosvar.h" // SET_BDA
-
-struct mode
+// Video Bios Extensions handlers
+//
+// Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
+// Copyright (C) 2001-2008 the LGPL VGABios developers Team
+//
+// This file may be distributed under the terms of the GNU LGPLv3 license.
+
+#include "vgabios.h" // handle_104f
+#include "config.h" // CONFIG_*
+#include "bregs.h" // struct bregs
+#include "vbe.h" // struct vbe_info
+#include "util.h" // dprintf
+#include "biosvar.h" // get_global_set
+#include "vgahw.h" // vgahw_set_mode
+
+int VBE_enabled VAR16;
+u32 VBE_total_memory VAR16 = 256 * 1024;
+u32 VBE_capabilities VAR16;
+u32 VBE_framebuffer VAR16;
+
+static void
+vbe_104f00(struct bregs *regs)
{
- u16 mode;
- u16 width;
- u16 height;
- u8 depth;
-} vbe_modes[] VAR16 = {
- /* standard modes */
- { 0x100, 640, 400, 8 },
- { 0x101, 640, 480, 8 },
- { 0x102, 800, 600, 4 },
- { 0x103, 800, 600, 8 },
- { 0x104, 1024, 768, 4 },
- { 0x105, 1024, 768, 8 },
- { 0x106, 1280, 1024, 4 },
- { 0x107, 1280, 1024, 8 },
- { 0x10D, 320, 200, 15 },
- { 0x10E, 320, 200, 16 },
- { 0x10F, 320, 200, 24 },
- { 0x110, 640, 480, 15 },
- { 0x111, 640, 480, 16 },
- { 0x112, 640, 480, 24 },
- { 0x113, 800, 600, 15 },
- { 0x114, 800, 600, 16 },
- { 0x115, 800, 600, 24 },
- { 0x116, 1024, 768, 15 },
- { 0x117, 1024, 768, 16 },
- { 0x118, 1024, 768, 24 },
- { 0x119, 1280, 1024, 15 },
- { 0x11A, 1280, 1024, 16 },
- { 0x11B, 1280, 1024, 24 },
- { 0x11C, 1600, 1200, 8 },
- { 0x11D, 1600, 1200, 15 },
- { 0x11E, 1600, 1200, 16 },
- { 0x11F, 1600, 1200, 24 },
- /* BOCHS modes */
- { 0x140, 320, 200, 32 },
- { 0x141, 640, 400, 32 },
- { 0x142, 640, 480, 32 },
- { 0x143, 800, 600, 32 },
- { 0x144, 1024, 768, 32 },
- { 0x145, 1280, 1024, 32 },
- { 0x146, 320, 200, 8 },
- { 0x147, 1600, 1200, 32 },
- { 0x148, 1152, 864, 8 },
- { 0x149, 1152, 864, 15 },
- { 0x14a, 1152, 864, 16 },
- { 0x14b, 1152, 864, 24 },
- { 0x14c, 1152, 864, 32 },
- { 0x178, 1280, 800, 16 },
- { 0x179, 1280, 800, 24 },
- { 0x17a, 1280, 800, 32 },
- { 0x17b, 1280, 960, 16 },
- { 0x17c, 1280, 960, 24 },
- { 0x17d, 1280, 960, 32 },
- { 0x17e, 1440, 900, 16 },
- { 0x17f, 1440, 900, 24 },
- { 0x180, 1440, 900, 32 },
- { 0x181, 1400, 1050, 16 },
- { 0x182, 1400, 1050, 24 },
- { 0x183, 1400, 1050, 32 },
- { 0x184, 1680, 1050, 16 },
- { 0x185, 1680, 1050, 24 },
- { 0x186, 1680, 1050, 32 },
- { 0x187, 1920, 1200, 16 },
- { 0x188, 1920, 1200, 24 },
- { 0x189, 1920, 1200, 32 },
- { 0x18a, 2560, 1600, 16 },
- { 0x18b, 2560, 1600, 24 },
- { 0x18c, 2560, 1600, 32 },
- { 0, },
-};
-
-#define BYTES_PER_PIXEL(m) ((GET_GLOBAL((m)->depth) + 7) / 8)
-
-u32 pci_lfb_addr VAR16;
-
-static inline u32 pci_config_readl(u8 bus, u8 devfn, u16 addr)
-{
- int status;
- u32 val;
- u16 bdf = (bus << 16) | devfn;
-
- addr &= ~3;
-
- asm volatile(
- "int $0x1a\n"
- "cli\n"
- "cld"
- : "=a"(status), "=c"(val)
- : "a"(0xb10a), "b"(bdf), "D"(addr)
- : "cc", "memory");
-
- if ((status >> 16))
- return (u32)-1;
-
- return val;
-}
+ u16 seg = regs->es;
+ struct vbe_info *info = (void*)(regs->di+0);
+
+ if (GET_FARVAR(seg, info->signature) == VBE2_SIGNATURE) {
+ dprintf(4, "Get VBE Controller: VBE2 Signature found\n");
+ } else if (GET_FARVAR(seg, info->signature) == VESA_SIGNATURE) {
+ dprintf(4, "Get VBE Controller: VESA Signature found\n");
+ } else {
+ dprintf(4, "Get VBE Controller: Invalid Signature\n");
+ }
+ memset_far(seg, info, 0, sizeof(*info));
-static u16 dispi_get_max_xres(void)
-{
- u16 en;
- u16 xres;
+ SET_FARVAR(seg, info->signature, VESA_SIGNATURE);
- en = dispi_read(VBE_DISPI_INDEX_ENABLE);
+ SET_FARVAR(seg, info->version, 0x0200);
- dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
- xres = dispi_read(VBE_DISPI_INDEX_XRES);
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
+ SET_FARVAR(seg, info->oem_string,
+ SEGOFF(get_global_seg(), (u32)VBE_OEM_STRING));
+ SET_FARVAR(seg, info->capabilities, GET_GLOBAL(VBE_capabilities));
- return xres;
-}
+ /* We generate our mode list in the reserved field of the info block */
+ u16 *destmode = (void*)info->reserved;
+ SET_FARVAR(seg, info->video_mode, SEGOFF(seg, (u32)destmode));
-static u16 dispi_get_max_bpp(void)
-{
- u16 en;
- u16 bpp;
+ /* Total memory (in 64 blocks) */
+ SET_FARVAR(seg, info->total_memory
+ , GET_GLOBAL(VBE_total_memory) / (64*1024));
- en = dispi_read(VBE_DISPI_INDEX_ENABLE);
+ SET_FARVAR(seg, info->oem_vendor_string,
+ SEGOFF(get_global_seg(), (u32)VBE_VENDOR_STRING));
+ SET_FARVAR(seg, info->oem_product_string,
+ SEGOFF(get_global_seg(), (u32)VBE_PRODUCT_STRING));
+ SET_FARVAR(seg, info->oem_revision_string,
+ SEGOFF(get_global_seg(), (u32)VBE_REVISION_STRING));
- dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
- bpp = dispi_read(VBE_DISPI_INDEX_BPP);
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
+ /* Fill list of modes */
+ u16 *last = (void*)&info->reserved[sizeof(info->reserved)];
+ vgahw_list_modes(seg, destmode, last - 1);
- return bpp;
+ regs->ax = 0x004f;
}
-/* Called only during POST */
-int
-vbe_init(u8 bus, u8 devfn)
+static void
+vbe_104f01(struct bregs *regs)
{
- u32 lfb_addr;
+ u16 seg = regs->es;
+ struct vbe_mode_info *info = (void*)(regs->di+0);
+ u16 mode = regs->cx;
- if (!CONFIG_VGA_BOCHS)
- return -1;
+ dprintf(1, "VBE mode info request: %x\n", mode);
- /* Sanity checks */
- dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0);
- if (dispi_read(VBE_DISPI_INDEX_ID) != VBE_DISPI_ID0) {
- dprintf(1, "No VBE DISPI interface detected\n");
- return -1;
+ struct vgamode_s *vmode_g = vgahw_find_mode(mode);
+ if (! vmode_g) {
+ dprintf(1, "VBE mode %x not found\n", mode);
+ regs->ax = 0x0100;
+ return;
}
- SET_BDA(vbe_flag, 0x1);
- dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
-
- if (CONFIG_VGA_PCI)
- lfb_addr = pci_config_readl(bus, devfn, 0x10) & ~0xf;
+ u16 mode_attr = VBE_MODE_ATTRIBUTE_SUPPORTED |
+ VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE |
+ VBE_MODE_ATTRIBUTE_COLOR_MODE |
+ VBE_MODE_ATTRIBUTE_GRAPHICS_MODE;
+ int depth = GET_GLOBAL(vmode_g->depth);
+ if (depth == 4)
+ mode_attr |= VBE_MODE_ATTRIBUTE_TTY_BIOS_SUPPORT;
else
- lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
-
- SET_FARVAR(get_global_seg(), pci_lfb_addr, lfb_addr);
+ mode_attr |= VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE;
+ SET_FARVAR(seg, info->mode_attributes, mode_attr);
+ SET_FARVAR(seg, info->winA_attributes,
+ VBE_WINDOW_ATTRIBUTE_RELOCATABLE |
+ VBE_WINDOW_ATTRIBUTE_READABLE |
+ VBE_WINDOW_ATTRIBUTE_WRITEABLE);
+ SET_FARVAR(seg, info->winB_attributes, 0);
+ SET_FARVAR(seg, info->win_granularity, 64); /* Bank size 64K */
+ SET_FARVAR(seg, info->win_size, 64); /* Bank size 64K */
+ SET_FARVAR(seg, info->winA_seg, 0xA000);
+ SET_FARVAR(seg, info->winB_seg, 0x0);
+ SET_FARVAR(seg, info->win_func_ptr.segoff, 0x0);
+ int width = GET_GLOBAL(vmode_g->width);
+ int height = GET_GLOBAL(vmode_g->height);
+ int linesize = width * DIV_ROUND_UP(depth, 8); // XXX - not always true
+ SET_FARVAR(seg, info->bytes_per_scanline, linesize);
+ SET_FARVAR(seg, info->xres, width);
+ SET_FARVAR(seg, info->yres, height);
+ SET_FARVAR(seg, info->xcharsize, 8);
+ SET_FARVAR(seg, info->ycharsize, 16);
+ if (depth == 4)
+ SET_FARVAR(seg, info->planes, 4);
+ else
+ SET_FARVAR(seg, info->planes, 1);
+ SET_FARVAR(seg, info->bits_per_pixel, depth);
+ SET_FARVAR(seg, info->banks, DIV_ROUND_UP(linesize * height, 64*1024));
+ if (depth == 4)
+ SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PLANAR);
+ else if (depth == 8)
+ SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PACKED_PIXEL);
+ else
+ SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_DIRECT_COLOR);
+ SET_FARVAR(seg, info->bank_size, 0);
+ u32 pages = GET_GLOBAL(VBE_total_memory) / (height * linesize);
+ if (depth == 4)
+ SET_FARVAR(seg, info->pages, (pages / 4) - 1);
+ else
+ SET_FARVAR(seg, info->pages, pages - 1);
+ SET_FARVAR(seg, info->reserved0, 1);
+
+ u8 r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
+
+ switch (depth) {
+ case 15: r_size = 5; r_pos = 10; g_size = 5; g_pos = 5;
+ b_size = 5; b_pos = 0; a_size = 1; a_pos = 15; break;
+ case 16: r_size = 5; r_pos = 11; g_size = 6; g_pos = 5;
+ b_size = 5; b_pos = 0; a_size = 0; a_pos = 0; break;
+ case 24: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
+ b_size = 8; b_pos = 0; a_size = 0; a_pos = 0; break;
+ case 32: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
+ b_size = 8; b_pos = 0; a_size = 8; a_pos = 24; break;
+ default: r_size = 0; r_pos = 0; g_size = 0; g_pos = 0;
+ b_size = 0; b_pos = 0; a_size = 0; a_pos = 0; break;
+ }
- dprintf(1, "VBE DISPI detected. lfb_addr=%x\n", GET_GLOBAL(pci_lfb_addr));
+ SET_FARVAR(seg, info->red_size, r_size);
+ SET_FARVAR(seg, info->red_pos, r_pos);
+ SET_FARVAR(seg, info->green_size, g_size);
+ SET_FARVAR(seg, info->green_pos, g_pos);
+ SET_FARVAR(seg, info->blue_size, b_size);
+ SET_FARVAR(seg, info->blue_pos, b_pos);
+ SET_FARVAR(seg, info->alpha_size, a_size);
+ SET_FARVAR(seg, info->alpha_pos, a_pos);
+
+ if (depth == 32)
+ SET_FARVAR(seg, info->directcolor_info,
+ VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE);
+ else
+ SET_FARVAR(seg, info->directcolor_info, 0);
- return 0;
+ if (depth > 4)
+ SET_FARVAR(seg, info->phys_base, GET_GLOBAL(VBE_framebuffer));
+ else
+ SET_FARVAR(seg, info->phys_base, 0);
+
+ SET_FARVAR(seg, info->reserved1, 0);
+ SET_FARVAR(seg, info->reserved2, 0);
+ SET_FARVAR(seg, info->linear_bytes_per_scanline, linesize);
+ SET_FARVAR(seg, info->bank_pages, 0);
+ SET_FARVAR(seg, info->linear_pages, 0);
+ SET_FARVAR(seg, info->linear_red_size, r_size);
+ SET_FARVAR(seg, info->linear_red_pos, r_pos);
+ SET_FARVAR(seg, info->linear_green_size, g_size);
+ SET_FARVAR(seg, info->linear_green_pos, g_pos);
+ SET_FARVAR(seg, info->linear_blue_size, b_size);
+ SET_FARVAR(seg, info->linear_blue_pos, b_pos);
+ SET_FARVAR(seg, info->linear_alpha_size, a_size);
+ SET_FARVAR(seg, info->linear_alpha_pos, a_pos);
+ SET_FARVAR(seg, info->pixclock_max, 0);
+
+ regs->ax = 0x004f;
}
-int
-vbe_enabled(void)
+static void
+vbe_104f02(struct bregs *regs)
{
- return GET_BDA(vbe_flag);
-}
+ dprintf(1, "VBE mode set: %x\n", regs->bx);
-u16
-vbe_total_mem(void)
-{
- return dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K);
+ int mode = regs->bx & 0x1ff;
+ int flags = regs->bx & (MF_CUSTOMCRTC|MF_LINEARFB|MF_NOCLEARMEM);
+ int ret = vgahw_set_mode(mode, flags);
+
+ regs->ah = ret;
+ regs->al = 0x4f;
}
-static struct mode *find_mode_entry(u16 mode)
+static void
+vbe_104f03(struct bregs *regs)
{
- struct mode *m;
+ u16 mode = GET_BDA(vbe_mode);
+ if (!mode)
+ regs->bx = GET_BDA(video_mode);
- for (m = vbe_modes; GET_GLOBAL(m->mode); m++) {
- if (GET_GLOBAL(m->mode) == mode)
- return m;
- }
+ dprintf(1, "VBE current mode=%x\n", regs->bx);
- return NULL;
+ regs->ax = 0x004f;
}
-static int mode_valid(struct mode *m)
+static void
+vbe_104f04(struct bregs *regs)
{
- u16 max_xres = dispi_get_max_xres();
- u16 max_bpp = dispi_get_max_bpp();
- u32 max_mem = vbe_total_mem() * 64 * 1024;
-
- u32 mem = GET_GLOBAL(m->width) * GET_GLOBAL(m->height) *
- BYTES_PER_PIXEL(m);
-
- if (GET_GLOBAL(m->width) > max_xres ||
- GET_GLOBAL(m->depth) > max_bpp ||
- mem > max_mem)
- return 0;
-
- return 1;
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-int
-vbe_list_modes(u16 seg, u16 ptr)
+static void
+vbe_104f05(struct bregs *regs)
{
- int count = 0;
- u16 *dest = (u16 *)(u32)ptr;
- struct mode *m;
-
- for (m = vbe_modes; GET_GLOBAL(m->mode); m++) {
- if (!mode_valid(m))
- continue;
-
- dprintf(1, "VBE found mode %x valid.\n", GET_GLOBAL(m->mode));
- SET_FARVAR(seg, dest[count], GET_GLOBAL(m->mode));
-
- count++;
- }
-
- SET_FARVAR(seg, dest[count], 0xffff); /* End of list */
-
- return count;
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-int
-vbe_mode_info(u16 mode, struct vbe_modeinfo *info)
+static void
+vbe_104f06(struct bregs *regs)
{
- struct mode *m;
-
- m = find_mode_entry(mode);
- if (!m || !mode_valid(m))
- return -1;
-
- info->width = GET_GLOBAL(m->width);
- info->height = GET_GLOBAL(m->height);
- info->depth = GET_GLOBAL(m->depth);
-
- info->linesize = info->width * ((info->depth + 7) / 8);
- info->phys_base = GET_GLOBAL(pci_lfb_addr);
- info->vram_size = vbe_total_mem() * 64 * 1024;
-
- return 0;
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-void
-vbe_hires_enable(int enable)
+static void
+vbe_104f07(struct bregs *regs)
{
- u16 flags = enable ?
- VBE_DISPI_ENABLED |
- VBE_DISPI_LFB_ENABLED |
- VBE_DISPI_NOCLEARMEM : 0;
-
- dispi_write(VBE_DISPI_INDEX_ENABLE, flags);
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-void
-vbe_set_mode(u16 mode, struct vbe_modeinfo *info)
+static void
+vbe_104f08(struct bregs *regs)
{
- if (info->depth == 4)
- vga_set_mode(0x6a, 0);
- if (info->depth == 8)
- // XXX load_dac_palette(3);
- ;
-
- dispi_write(VBE_DISPI_INDEX_BPP, info->depth);
- dispi_write(VBE_DISPI_INDEX_XRES, info->width);
- dispi_write(VBE_DISPI_INDEX_YRES, info->height);
- dispi_write(VBE_DISPI_INDEX_BANK, 0);
-
- /* VGA compat setup */
- //XXX: This probably needs some reverse engineering
- u8 v;
- outw(0x0011, VGAREG_VGA_CRTC_ADDRESS);
- outw(((info->width * 4 - 1) << 8) | 0x1, VGAREG_VGA_CRTC_ADDRESS);
- dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, info->width);
- outw(((info->height - 1) << 8) | 0x12, VGAREG_VGA_CRTC_ADDRESS);
- outw(((info->height - 1) & 0xff00) | 0x7, VGAREG_VGA_CRTC_ADDRESS);
- v = inb(VGAREG_VGA_CRTC_DATA) & 0xbd;
- if (v & 0x1)
- v |= 0x2;
- if (v & 0x2)
- v |= 0x40;
- outb(v, VGAREG_VGA_CRTC_DATA);
-
- outw(0x9, VGAREG_VGA_CRTC_ADDRESS);
- outb(0x17, VGAREG_VGA_CRTC_ADDRESS);
- outb(inb(VGAREG_VGA_CRTC_DATA) | 0x3, VGAREG_VGA_CRTC_DATA);
- v = inb(VGAREG_ACTL_RESET);
- outw(0x10, VGAREG_ACTL_ADDRESS);
- v = inb(VGAREG_ACTL_READ_DATA) | 0x1;
- outb(v, VGAREG_ACTL_ADDRESS);
- outb(0x20, VGAREG_ACTL_ADDRESS);
- outw(0x0506, VGAREG_GRDC_ADDRESS);
- outw(0x0f02, VGAREG_SEQU_ADDRESS);
- if (info->depth >= 8) {
- outb(0x14, VGAREG_VGA_CRTC_ADDRESS);
- outb(inb(VGAREG_VGA_CRTC_DATA) | 0x40, VGAREG_VGA_CRTC_DATA);
- v = inb(VGAREG_ACTL_RESET);
- outw(0x10, VGAREG_ACTL_ADDRESS);
- v = inb(VGAREG_ACTL_READ_DATA) | 0x40;
- outb(v, VGAREG_ACTL_ADDRESS);
- outb(0x20, VGAREG_ACTL_ADDRESS);
- outb(0x04, VGAREG_SEQU_ADDRESS);
- v = inb(VGAREG_SEQU_DATA) | 0x08;
- outb(v, VGAREG_SEQU_DATA);
- outb(0x05, VGAREG_GRDC_ADDRESS);
- v = inb(VGAREG_GRDC_DATA) & 0x9f;
- outb(v | 0x40, VGAREG_GRDC_DATA);
- }
-
- SET_BDA(vbe_mode, mode);
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-void
-vbe_clear_scr(void)
+static void
+vbe_104f0a(struct bregs *regs)
{
- u16 en;
-
- en = dispi_read(VBE_DISPI_INDEX_ENABLE);
- en &= ~VBE_DISPI_NOCLEARMEM;
- dispi_write(VBE_DISPI_INDEX_ENABLE, en);
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-int
-vbe_hires_enabled(void)
+static void
+vbe_104fXX(struct bregs *regs)
{
- return dispi_read(VBE_DISPI_INDEX_ENABLE) & VBE_DISPI_ENABLED;
+ debug_stub(regs);
+ regs->ax = 0x0100;
}
-u16
-vbe_curr_mode(void)
+void
+handle_104f(struct bregs *regs)
{
- return GET_BDA(vbe_mode);
-}
+ if (!GET_GLOBAL(VBE_enabled)) {
+ vbe_104fXX(regs);
+ return;
+ }
+ switch (regs->al) {
+ case 0x00: vbe_104f00(regs); break;
+ case 0x01: vbe_104f01(regs); break;
+ case 0x02: vbe_104f02(regs); break;
+ case 0x03: vbe_104f03(regs); break;
+ case 0x04: vbe_104f04(regs); break;
+ case 0x05: vbe_104f05(regs); break;
+ case 0x06: vbe_104f06(regs); break;
+ case 0x07: vbe_104f07(regs); break;
+ case 0x08: vbe_104f08(regs); break;
+ case 0x0a: vbe_104f0a(regs); break;
+ default: vbe_104fXX(regs); break;
+ }
+}
projects / seabios.git / blobdiff