//
// This file may be distributed under the terms of the GNU LGPLv3 license.
-#include "stdvga.h" // vgahw_init
+#include "stdvga.h" // stdvga_init
#include "ioport.h" // outb
#include "farptr.h" // SET_FARVAR
-#include "biosvar.h" // GET_BDA
-#include "vgabios.h" // VGAREG_*
+#include "biosvar.h" // GET_GLOBAL
+#include "util.h" // memcpy_far
// TODO
// * replace direct in/out calls with wrapper functions
****************************************************************/
void
-vgahw_screen_disable(void)
+stdvga_screen_disable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x00, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_screen_enable(void)
+stdvga_screen_enable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x20, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_set_border_color(u8 color)
+stdvga_set_border_color(u8 color)
{
inb(VGAREG_ACTL_RESET);
outb(0x00, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_set_overscan_border_color(u8 color)
+stdvga_set_overscan_border_color(u8 color)
{
inb(VGAREG_ACTL_RESET);
outb(0x11, VGAREG_ACTL_ADDRESS);
}
u8
-vgahw_get_overscan_border_color(void)
+stdvga_get_overscan_border_color(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x11, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_set_palette(u8 palid)
+stdvga_set_palette(u8 palid)
{
inb(VGAREG_ACTL_RESET);
palid &= 0x01;
}
void
-vgahw_set_single_palette_reg(u8 reg, u8 val)
+stdvga_set_single_palette_reg(u8 reg, u8 val)
{
inb(VGAREG_ACTL_RESET);
outb(reg, VGAREG_ACTL_ADDRESS);
}
u8
-vgahw_get_single_palette_reg(u8 reg)
+stdvga_get_single_palette_reg(u8 reg)
{
inb(VGAREG_ACTL_RESET);
outb(reg, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_set_all_palette_reg(u16 seg, u8 *data_far)
+stdvga_set_all_palette_reg(u16 seg, u8 *data_far)
{
inb(VGAREG_ACTL_RESET);
int i;
}
void
-vgahw_get_all_palette_reg(u16 seg, u8 *data_far)
+stdvga_get_all_palette_reg(u16 seg, u8 *data_far)
{
int i;
for (i = 0; i < 0x10; i++) {
}
void
-vgahw_toggle_intensity(u8 flag)
+stdvga_toggle_intensity(u8 flag)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_select_video_dac_color_page(u8 flag, u8 data)
+stdvga_select_video_dac_color_page(u8 flag, u8 data)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_read_video_dac_state(u8 *pmode, u8 *curpage)
+stdvga_read_video_dac_state(u8 *pmode, u8 *curpage)
{
inb(VGAREG_ACTL_RESET);
outb(0x10, VGAREG_ACTL_ADDRESS);
****************************************************************/
void
-vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
+stdvga_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
{
outb(start, VGAREG_DAC_WRITE_ADDRESS);
while (count) {
}
void
-vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
+stdvga_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count)
{
outb(start, VGAREG_DAC_READ_ADDRESS);
while (count) {
}
void
-vgahw_set_pel_mask(u8 val)
+stdvga_set_pel_mask(u8 val)
{
outb(val, VGAREG_PEL_MASK);
}
u8
-vgahw_get_pel_mask(void)
+stdvga_get_pel_mask(void)
{
return inb(VGAREG_PEL_MASK);
}
void
-vgahw_save_dac_state(u16 seg, struct saveDACcolors *info)
+stdvga_save_dac_state(u16 seg, struct saveDACcolors *info)
{
/* XXX: check this */
SET_FARVAR(seg, info->rwmode, inb(VGAREG_DAC_STATE));
SET_FARVAR(seg, info->peladdr, inb(VGAREG_DAC_WRITE_ADDRESS));
SET_FARVAR(seg, info->pelmask, inb(VGAREG_PEL_MASK));
- vgahw_get_dac_regs(seg, info->dac, 0, 256);
+ stdvga_get_dac_regs(seg, info->dac, 0, 256);
SET_FARVAR(seg, info->color_select, 0);
}
void
-vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info)
+stdvga_restore_dac_state(u16 seg, struct saveDACcolors *info)
{
outb(GET_FARVAR(seg, info->pelmask), VGAREG_PEL_MASK);
- vgahw_set_dac_regs(seg, info->dac, 0, 256);
+ stdvga_set_dac_regs(seg, info->dac, 0, 256);
outb(GET_FARVAR(seg, info->peladdr), VGAREG_DAC_WRITE_ADDRESS);
}
****************************************************************/
void
-vgahw_sequ_write(u8 index, u8 value)
+stdvga_sequ_write(u8 index, u8 value)
{
outw((value<<8) | index, VGAREG_SEQU_ADDRESS);
}
void
-vgahw_grdc_write(u8 index, u8 value)
+stdvga_grdc_write(u8 index, u8 value)
{
outw((value<<8) | index, VGAREG_GRDC_ADDRESS);
}
void
-vgahw_set_text_block_specifier(u8 spec)
+stdvga_set_text_block_specifier(u8 spec)
{
outw((spec << 8) | 0x03, VGAREG_SEQU_ADDRESS);
}
-void
+
+/****************************************************************
+ * Font loading
+ ****************************************************************/
+
+static void
get_font_access(void)
{
outw(0x0100, VGAREG_SEQU_ADDRESS);
outw(0x0406, VGAREG_GRDC_ADDRESS);
}
-void
+static void
release_font_access(void)
{
outw(0x0100, VGAREG_SEQU_ADDRESS);
outw(0x0302, VGAREG_SEQU_ADDRESS);
outw(0x0304, VGAREG_SEQU_ADDRESS);
outw(0x0300, VGAREG_SEQU_ADDRESS);
- u16 v = (inw(VGAREG_READ_MISC_OUTPUT) & 0x01) ? 0x0e : 0x0a;
+ u16 v = (inb(VGAREG_READ_MISC_OUTPUT) & 0x01) ? 0x0e : 0x0a;
outw((v << 8) | 0x06, VGAREG_GRDC_ADDRESS);
outw(0x0004, VGAREG_GRDC_ADDRESS);
outw(0x1005, VGAREG_GRDC_ADDRESS);
}
+void
+stdvga_load_font(u16 seg, void *src_far, u16 count
+ , u16 start, u8 destflags, u8 fontsize)
+{
+ get_font_access();
+ u16 blockaddr = ((destflags & 0x03) << 14) + ((destflags & 0x04) << 11);
+ void *dest_far = (void*)(blockaddr + start*32);
+ u16 i;
+ for (i = 0; i < count; i++)
+ memcpy_far(SEG_GRAPH, dest_far + i*32
+ , seg, src_far + i*fontsize, fontsize);
+ release_font_access();
+}
+
/****************************************************************
* CRTC registers
****************************************************************/
-static u16
-get_crtc(void)
+u16
+stdvga_get_crtc(void)
{
- return GET_BDA(crtc_address);
+ if (inb(VGAREG_READ_MISC_OUTPUT) & 1)
+ return VGAREG_VGA_CRTC_ADDRESS;
+ return VGAREG_MDA_CRTC_ADDRESS;
}
void
-vgahw_set_cursor_shape(u8 start, u8 end)
+stdvga_set_cursor_shape(u8 start, u8 end)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
outb(0x0a, crtc_addr);
outb(start, crtc_addr + 1);
outb(0x0b, crtc_addr);
}
void
-vgahw_set_active_page(u16 address)
+stdvga_set_active_page(u16 address)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
outb(0x0c, crtc_addr);
outb((address & 0xff00) >> 8, crtc_addr + 1);
outb(0x0d, crtc_addr);
}
void
-vgahw_set_cursor_pos(u16 address)
+stdvga_set_cursor_pos(u16 address)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
outb(0x0e, crtc_addr);
outb((address & 0xff00) >> 8, crtc_addr + 1);
outb(0x0f, crtc_addr);
}
void
-vgahw_set_scan_lines(u8 lines)
+stdvga_set_scan_lines(u8 lines)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
outb(0x09, crtc_addr);
u8 crtc_r9 = inb(crtc_addr + 1);
crtc_r9 = (crtc_r9 & 0xe0) | (lines - 1);
// Get vertical display end
u16
-vgahw_get_vde(void)
+stdvga_get_vde(void)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
outb(0x12, crtc_addr);
u16 vde = inb(crtc_addr + 1);
outb(0x07, crtc_addr);
****************************************************************/
void
-vgahw_save_state(u16 seg, struct saveVideoHardware *info)
+stdvga_save_state(u16 seg, struct saveVideoHardware *info)
{
- u16 crtc_addr = get_crtc();
+ u16 crtc_addr = stdvga_get_crtc();
SET_FARVAR(seg, info->sequ_index, inb(VGAREG_SEQU_ADDRESS));
SET_FARVAR(seg, info->crtc_index, inb(crtc_addr));
SET_FARVAR(seg, info->grdc_index, inb(VGAREG_GRDC_ADDRESS));
}
void
-vgahw_restore_state(u16 seg, struct saveVideoHardware *info)
+stdvga_restore_state(u16 seg, struct saveVideoHardware *info)
{
// Reset Attribute Ctl flip-flop
inb(VGAREG_ACTL_RESET);
}
void
-vgahw_set_mode(struct vgamode_s *vmode_g)
+stdvga_set_mode(struct vgamode_s *vmode_g)
{
// Reset Attribute Ctl flip-flop
inb(VGAREG_ACTL_RESET);
****************************************************************/
void
-vgahw_enable_video_addressing(u8 disable)
+stdvga_enable_video_addressing(u8 disable)
{
u8 v = (disable & 1) ? 0x00 : 0x02;
u8 v2 = inb(VGAREG_READ_MISC_OUTPUT) & ~0x02;
}
void
-vgahw_init(void)
+stdvga_init(void)
{
// switch to color mode and enable CPU access 480 lines
outb(0xc3, VGAREG_WRITE_MISC_OUTPUT);
projects / seabios.git / blobdiff