return VGAREG_MDA_CRTC_ADDRESS;
}
-void
-stdvga_set_cursor_shape(u8 start, u8 end)
+// Return the multiplication factor needed for the vga offset register.
+int
+stdvga_bpp_factor(struct vgamode_s *vmode_g)
{
- u16 crtc_addr = stdvga_get_crtc();
- stdvga_crtc_write(crtc_addr, 0x0a, start);
- stdvga_crtc_write(crtc_addr, 0x0b, end);
+ switch (GET_GLOBAL(vmode_g->memmodel)) {
+ case MM_TEXT:
+ return 2;
+ case MM_CGA:
+ return GET_GLOBAL(vmode_g->depth);
+ case MM_PLANAR:
+ return 1;
+ default:
+ return 4;
+ }
}
void
-stdvga_set_active_page(u16 address)
+stdvga_set_cursor_shape(u8 start, u8 end)
{
u16 crtc_addr = stdvga_get_crtc();
- stdvga_crtc_write(crtc_addr, 0x0c, address >> 8);
- stdvga_crtc_write(crtc_addr, 0x0d, address);
+ stdvga_crtc_write(crtc_addr, 0x0a, start);
+ stdvga_crtc_write(crtc_addr, 0x0b, end);
}
void
-stdvga_set_cursor_pos(u16 address)
+stdvga_set_cursor_pos(int address)
{
u16 crtc_addr = stdvga_get_crtc();
+ address /= 2; // Assume we're in text mode.
stdvga_crtc_write(crtc_addr, 0x0e, address >> 8);
stdvga_crtc_write(crtc_addr, 0x0f, address);
}
return -1;
}
+int
+stdvga_get_linelength(struct vgamode_s *vmode_g)
+{
+ u8 val = stdvga_crtc_read(stdvga_get_crtc(), 0x13);
+ return val * stdvga_bpp_factor(vmode_g) * 2;
+}
+
+int
+stdvga_set_linelength(struct vgamode_s *vmode_g, int val)
+{
+ int factor = stdvga_bpp_factor(vmode_g) * 2;
+ stdvga_crtc_write(stdvga_get_crtc(), 0x13, DIV_ROUND_UP(val, factor));
+ return 0;
+}
+
+int
+stdvga_get_displaystart(struct vgamode_s *vmode_g)
+{
+ u16 crtc_addr = stdvga_get_crtc();
+ int addr = (stdvga_crtc_read(crtc_addr, 0x0c) << 8
+ | stdvga_crtc_read(crtc_addr, 0x0d));
+ return addr * stdvga_bpp_factor(vmode_g);
+}
+
+int
+stdvga_set_displaystart(struct vgamode_s *vmode_g, int val)
+{
+ u16 crtc_addr = stdvga_get_crtc();
+ val /= stdvga_bpp_factor(vmode_g);
+ stdvga_crtc_write(crtc_addr, 0x0c, val >> 8);
+ stdvga_crtc_write(crtc_addr, 0x0d, val);
+ return 0;
+}
+
/****************************************************************
* Save/Restore/Set state