#include "bregs.h" // struct bregs
#include "vbe.h" // struct vbe_info
#include "stdvga.h" // VGAREG_SEQU_ADDRESS
+#include "pci.h" // pci_config_readl
+#include "pci_regs.h" // PCI_BASE_ADDRESS_0
/****************************************************************
outb(0xff, VGAREG_PEL_MASK);
u8 memmodel = GET_GLOBAL(table->info.memmodel);
- u8 v = stdvga_get_single_palette_reg(0x10) & 0xfe;
+ u8 on = 0;
if (memmodel == MM_PLANAR)
- v |= 0x41;
+ on = 0x41;
else if (memmodel != MM_TEXT)
- v |= 0x01;
- stdvga_set_single_palette_reg(0x10, v);
+ on = 0x01;
+ stdvga_attr_mask(0x10, 0x01, on);
}
static u8
int
clext_set_mode(int mode, int flags)
{
- dprintf(1, "cirrus mode %d\n", mode);
+ dprintf(1, "cirrus mode %x\n", mode);
SET_BDA(vbe_mode, 0);
struct cirrus_mode_s *table_g = cirrus_get_modeentry(mode);
if (table_g) {
return -1;
dprintf(1, "cirrus init 2\n");
+ SET_VGA(VBE_enabled, 1);
+ u32 lfb_addr = 0;
+ if (CONFIG_VGA_PCI)
+ lfb_addr = (pci_config_readl(GET_GLOBAL(VgaBDF), PCI_BASE_ADDRESS_0)
+ & PCI_BASE_ADDRESS_MEM_MASK);
+ SET_VGA(VBE_framebuffer, lfb_addr);
u16 totalmem = cirrus_get_memsize();
SET_VGA(VBE_total_memory, totalmem * 64 * 1024);
SET_VGA(VBE_win_granularity, 16);