grml...

[seabios.git] / src / util.h

diff --git a/src/util.h b/src/util.h
index cb544321be67377dc46dee80e594b4571017e3e3..70d3c4c3271ff468925ae515f54c5dfb3ebbdc44 100644 (file)
--- a/src/util.h
+++ b/src/util.h
@@ -18,15 +18,14 @@ static inline void irq_enable(void)
     asm volatile("sti": : :"memory");
 }
 
-static inline unsigned long irq_save(void)
+static inline u32 save_flags(void)
 {
-    unsigned long flags;
-    asm volatile("pushfl ; popl %0" : "=g" (flags): :"memory");
-    irq_disable();
+    u32 flags;
+    asm volatile("pushfl ; popl %0" : "=rm" (flags));
     return flags;
 }
 
-static inline void irq_restore(unsigned long flags)
+static inline void restore_flags(u32 flags)
 {
     asm volatile("pushl %0 ; popfl" : : "g" (flags) : "memory", "cc");
 }
@@ -51,16 +50,26 @@ static inline void wbinvd(void)
     asm volatile("wbinvd": : :"memory");
 }
 
+#define CPUID_TSC (1 << 4)
 #define CPUID_MSR (1 << 5)
 #define CPUID_APIC (1 << 9)
 #define CPUID_MTRR (1 << 12)
-static inline void cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
+static inline void __cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
 {
     asm("cpuid"
         : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
         : "0" (index));
 }
 
+static inline u32 getcr0(void) {
+    u32 cr0;
+    asm("movl %%cr0, %0" : "=r"(cr0));
+    return cr0;
+}
+static inline void setcr0(u32 cr0) {
+    asm("movl %0, %%cr0" : : "r"(cr0));
+}
+
 static inline u64 rdmsr(u32 index)
 {
     u64 ret;
@@ -120,6 +129,11 @@ static inline u32 cpu_to_le32(u32 x)
     return x;
 }
 
+static inline u32 le32_to_cpu(u32 x)
+{
+    return x;
+}
+
 static inline u32 getesp(void) {
     u32 esp;
     asm("movl %%esp, %0" : "=rm"(esp));
@@ -182,6 +196,7 @@ struct descloc_s {
 } PACKED;
 
 // util.c
+void cpuid(u32 index, u32 *eax, u32 *ebx, u32 *ecx, u32 *edx);
 struct bregs;
 inline void call16(struct bregs *callregs);
 inline void call16big(struct bregs *callregs);
@@ -217,6 +232,7 @@ int get_keystroke(int msec);
 u32 call32(void *func, u32 eax, u32 errret);
 inline u32 stack_hop(u32 eax, u32 edx, void *func);
 extern struct thread_info MainThread;
+extern int CanPreempt;
 struct thread_info *getCurThread(void);
 void yield(void);
 void wait_irq(void);
@@ -311,9 +327,7 @@ void lpt_setup(void);
 // clock.c
 #define PIT_TICK_RATE 1193180   // Underlying HZ of PIT
 #define PIT_TICK_INTERVAL 65536 // Default interval for 18.2Hz timer
-static inline int check_tsc(u64 end) {
-    return (s64)(rdtscll() - end) > 0;
-}
+int check_tsc(u64 end);
 void timer_setup(void);
 void ndelay(u32 count);
 void udelay(u32 count);
@@ -342,46 +356,10 @@ void bios32_setup(void);
 // shadow.c
 void make_bios_writable(void);
 void make_bios_readonly(void);
-void make_bios_writable_intel(u16 bdf, u32 pam0);
-void make_bios_readonly_intel(u16 bdf, u32 pam0);
 void qemu_prep_reset(void);
 
-// smm.c
-void smm_save_and_copy(void);
-void smm_relocate_and_restore(void);
-
-// pci_region.c
-// region allocator. pci region allocates the requested region
-// sequentially with overflow check.
-struct pci_region {
-    // The region is [first, last].
-    u32 first;
-    u32 last;
-
-    // The next allocation starts from here.
-    // i.e. [start, cur_first) is allocated.
-    // Right after initialization cur_first == first.
-    u32 cur_first;
-};
-// initialize the pci_region of [first, last]
-// last must not be 0xffffffff
-void pci_region_init(struct pci_region *r, u32 first, u32 last);
-// allocate the region of size
-u32 pci_region_alloc(struct pci_region *r, u32 size);
-// make the next allocation aligned to align
-u32 pci_region_align(struct pci_region *r, u32 align);
-// revert the allocation to addr.
-void pci_region_revert(struct pci_region *r, u32 addr);
-// make the allocation fail.
-u32 pci_region_disable(struct pci_region *r);
-// returns the current allocation point.
-u32 pci_region_addr(const struct pci_region *r);
-// returns the region size.
-u32 pci_region_size(const struct pci_region *r);
-
 // pciinit.c
 extern const u8 pci_irqs[4];
-void pci_bios_allocate_regions(u16 bdf, void *arg);
 void pci_setup(void);
 
 // smm.c
@@ -394,6 +372,7 @@ void wrmsr_smp(u32 index, u64 val);
 void smp_probe(void);
 
 // coreboot.c
+extern const char *CBvendor, *CBpart;
 struct cbfs_file;
 struct cbfs_file *cbfs_finddatafile(const char *fname);
 struct cbfs_file *cbfs_findprefix(const char *prefix, struct cbfs_file *last);
@@ -409,11 +388,12 @@ void coreboot_setup(void);
 void copy_pir(void *pos);
 void copy_mptable(void *pos);
 void copy_acpi_rsdp(void *pos);
+void copy_smbios(void *pos);
 
 // vgahooks.c
-extern int VGAbdf;
 void handle_155f(struct bregs *regs);
-void vgahook_setup(const char *vendor, const char *part);
+struct pci_device;
+void vgahook_setup(struct pci_device *pci);
 
 // optionroms.c
 void call_bcv(u16 seg, u16 ip);
@@ -421,6 +401,7 @@ void optionrom_setup(void);
 void vga_setup(void);
 void s3_resume_vga_init(void);
 extern u32 RomEnd;
+extern int ScreenAndDebug;
 
 // bootsplash.c
 void enable_vga_console(void);
@@ -428,6 +409,7 @@ void enable_bootsplash(void);
 void disable_bootsplash(void);
 
 // resume.c
+extern int HaveRunPost;
 void init_dma(void);
 
 // pnpbios.c
@@ -438,6 +420,7 @@ void pnp_setup(void);
 // pmm.c
 extern struct zone_s ZoneLow, ZoneHigh, ZoneFSeg, ZoneTmpLow, ZoneTmpHigh;
 void malloc_setup(void);
+void malloc_fixupreloc(void);
 void malloc_finalize(void);
 void *pmm_malloc(struct zone_s *zone, u32 handle, u32 size, u32 align);
 int pmm_free(void *data);