#include "pci_regs.h" // PCI_BASE_ADDRESS_0
#include "usb.h" // struct usb_s
#include "farptr.h" // GET_FLATPTR
-#include "usb-hub.h" // struct usbhub_s
#define FIT (1 << 31)
* Root hub
****************************************************************/
-static void
-init_ohci_port(void *data)
+// Check if device attached to port
+static int
+ohci_hub_detect(struct usbhub_s *hub, u32 port)
{
- struct usbhub_s *hub = data;
- u32 port = hub->port; // XXX - find better way to pass port
struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
-
u32 sts = readl(&cntl->regs->roothub_portstatus[port]);
if (!(sts & RH_PS_CCS))
// No device.
- goto done;
+ return -1;
// XXX - need to wait for USB_TIME_ATTDB if just powered up?
- // Signal reset
- mutex_lock(&cntl->usb.resetlock);
+ return 0;
+}
+
+// Disable port
+static void
+ohci_hub_disconnect(struct usbhub_s *hub, u32 port)
+{
+ struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
+ writel(&cntl->regs->roothub_portstatus[port], RH_PS_CCS|RH_PS_LSDA);
+}
+
+// Reset device on port
+static int
+ohci_hub_reset(struct usbhub_s *hub, u32 port)
+{
+ struct usb_ohci_s *cntl = container_of(hub->cntl, struct usb_ohci_s, usb);
writel(&cntl->regs->roothub_portstatus[port], RH_PS_PRS);
+ u32 sts;
u64 end = calc_future_tsc(USB_TIME_DRSTR * 2);
for (;;) {
sts = readl(&cntl->regs->roothub_portstatus[port]);
if (!(sts & RH_PS_PRS))
// XXX - need to ensure USB_TIME_DRSTR time in reset?
break;
- if (check_time(end)) {
+ if (check_tsc(end)) {
// Timeout.
warn_timeout();
- goto resetfail;
+ ohci_hub_disconnect(hub, port);
+ return -1;
}
yield();
}
if ((sts & (RH_PS_CCS|RH_PS_PES)) != (RH_PS_CCS|RH_PS_PES))
// Device no longer present
- goto resetfail;
-
- // Set address of port
- struct usb_pipe *pipe = usb_set_address(&cntl->usb, !!(sts & RH_PS_LSDA));
- if (!pipe)
- goto resetfail;
- mutex_unlock(&cntl->usb.resetlock);
-
- // Configure the device
- int count = configure_usb_device(pipe);
- free_pipe(pipe);
- if (! count)
- // Shutdown port
- writel(&cntl->regs->roothub_portstatus[port], RH_PS_CCS|RH_PS_LSDA);
- hub->devcount += count;
-done:
- hub->threads--;
- return;
+ return -1;
-resetfail:
- // Shutdown port
- writel(&cntl->regs->roothub_portstatus[port], RH_PS_CCS|RH_PS_LSDA);
- mutex_unlock(&cntl->usb.resetlock);
- goto done;
+ return !!(sts & RH_PS_LSDA);
}
+static struct usbhub_op_s ohci_HubOp = {
+ .detect = ohci_hub_detect,
+ .reset = ohci_hub_reset,
+ .disconnect = ohci_hub_disconnect,
+};
+
// Find any devices connected to the root hub.
static int
check_ohci_ports(struct usb_ohci_s *cntl)
msleep((rha >> 24) * 2);
// XXX - need to sleep for USB_TIME_SIGATT if just powered up?
- // Lanuch a thread per port.
struct usbhub_s hub;
memset(&hub, 0, sizeof(hub));
hub.cntl = &cntl->usb;
- int ports = rha & RH_A_NDP;
- hub.threads = ports;
- int i;
- for (i=0; i<ports; i++) {
- hub.port = i;
- run_thread(init_ohci_port, &hub);
- }
-
- // Wait for threads to complete.
- while (hub.threads)
- yield();
-
+ hub.portcount = rha & RH_A_NDP;
+ hub.op = &ohci_HubOp;
+ usb_enumerate(&hub);
return hub.devcount;
}
u32 status = readl(&cntl->regs->cmdstatus);
if (! status & OHCI_HCR)
break;
- if (check_time(end)) {
+ if (check_tsc(end)) {
warn_timeout();
return -1;
}
}
void
-ohci_init(u16 bdf, int busid)
+ohci_init(struct pci_device *pci, int busid)
{
if (! CONFIG_USB_OHCI)
return;
struct usb_ohci_s *cntl = malloc_tmphigh(sizeof(*cntl));
+ if (!cntl) {
+ warn_noalloc();
+ return;
+ }
memset(cntl, 0, sizeof(*cntl));
cntl->usb.busid = busid;
+ cntl->usb.pci = pci;
cntl->usb.type = USB_TYPE_OHCI;
+ u16 bdf = pci->bdf;
u32 baseaddr = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
cntl->regs = (void*)(baseaddr & PCI_BASE_ADDRESS_MEM_MASK);
- dprintf(3, "OHCI init on dev %02x:%02x.%x (regs=%p)\n"
+ dprintf(1, "OHCI init on dev %02x:%02x.%x (regs=%p)\n"
, pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf)
, pci_bdf_to_fn(bdf), cntl->regs);
for (;;) {
if (ed->hwHeadP == ed->hwTailP)
return 0;
- if (check_time(end)) {
+ if (check_tsc(end)) {
warn_timeout();
return -1;
}
for (;;) {
if (hcca->frame_no != startframe)
break;
- if (check_time(end)) {
+ if (check_tsc(end)) {
warn_timeout();
return;
}
return NULL;
}
memset(pipe, 0, sizeof(*pipe));
- pipe->ed.hwINFO = ED_SKIP;
memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
+ pipe->ed.hwINFO = ED_SKIP;
// Add queue head to controller list.
pipe->ed.hwNextED = cntl->regs->ed_controlhead;
struct usb_ohci_s *cntl = container_of(
pipe->pipe.cntl, struct usb_ohci_s, usb);
int maxpacket = pipe->pipe.maxpacket;
- int lowspeed = pipe->pipe.lowspeed;
+ int lowspeed = pipe->pipe.speed;
int devaddr = pipe->pipe.devaddr | (pipe->pipe.ep << 7);
// Setup transfer descriptors
struct ohci_td *tds = malloc_tmphigh(sizeof(*tds) * 3);
- tds[0].hwINFO = TD_DP_SETUP | TD_T_DATA0 | TD_CC;
- tds[0].hwCBP = (u32)cmd;
- tds[0].hwNextTD = (u32)&tds[1];
- tds[0].hwBE = (u32)cmd + cmdsize - 1;
- tds[1].hwINFO = (dir ? TD_DP_IN : TD_DP_OUT) | TD_T_DATA1 | TD_CC;
- tds[1].hwCBP = datasize ? (u32)data : 0;
- tds[1].hwNextTD = (u32)&tds[2];
- tds[1].hwBE = (u32)data + datasize - 1;
- tds[2].hwINFO = (dir ? TD_DP_OUT : TD_DP_IN) | TD_T_DATA1 | TD_CC;
- tds[2].hwCBP = 0;
- tds[2].hwNextTD = (u32)&tds[3];
- tds[2].hwBE = 0;
+ if (!tds) {
+ warn_noalloc();
+ return -1;
+ }
+ struct ohci_td *td = tds;
+ td->hwINFO = TD_DP_SETUP | TD_T_DATA0 | TD_CC;
+ td->hwCBP = (u32)cmd;
+ td->hwNextTD = (u32)&td[1];
+ td->hwBE = (u32)cmd + cmdsize - 1;
+ td++;
+ if (datasize) {
+ td->hwINFO = (dir ? TD_DP_IN : TD_DP_OUT) | TD_T_DATA1 | TD_CC;
+ td->hwCBP = (u32)data;
+ td->hwNextTD = (u32)&td[1];
+ td->hwBE = (u32)data + datasize - 1;
+ td++;
+ }
+ td->hwINFO = (dir ? TD_DP_OUT : TD_DP_IN) | TD_T_DATA1 | TD_CC;
+ td->hwCBP = 0;
+ td->hwNextTD = (u32)&td[1];
+ td->hwBE = 0;
+ td++;
// Transfer data
pipe->ed.hwINFO = ED_SKIP;
barrier();
- pipe->ed.hwHeadP = (u32)&tds[0];
- pipe->ed.hwTailP = (u32)&tds[3];
+ pipe->ed.hwHeadP = (u32)tds;
+ pipe->ed.hwTailP = (u32)td;
barrier();
pipe->ed.hwINFO = devaddr | (maxpacket << 16) | (lowspeed ? ED_LOWSPEED : 0);
writel(&cntl->regs->cmdstatus, OHCI_CLF);
return ret;
}
+struct usb_pipe *
+ohci_alloc_bulk_pipe(struct usb_pipe *dummy)
+{
+ if (! CONFIG_USB_OHCI)
+ return NULL;
+ dprintf(1, "OHCI Bulk transfers not supported.\n");
+ return NULL;
+}
+
+int
+ohci_send_bulk(struct usb_pipe *p, int dir, void *data, int datasize)
+{
+ return -1;
+}
+
struct usb_pipe *
ohci_alloc_intr_pipe(struct usb_pipe *dummy, int frameexp)
{
if (frameexp > 5)
frameexp = 5;
int maxpacket = dummy->maxpacket;
- int lowspeed = dummy->lowspeed;
+ int lowspeed = dummy->speed;
int devaddr = dummy->devaddr | (dummy->ep << 7);
// Determine number of entries needed for 2 timer ticks.
int ms = 1<<frameexp;
- int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
+ int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms)+1;
struct ohci_pipe *pipe = malloc_low(sizeof(*pipe));
struct ohci_td *tds = malloc_low(sizeof(*tds) * count);
void *data = malloc_low(maxpacket * count);
if (!pipe || !tds || !data)
goto err;
+ memset(pipe, 0, sizeof(*pipe));
+ memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
+ pipe->data = data;
+ pipe->count = count;
+ pipe->tds = tds;
struct ohci_ed *ed = &pipe->ed;
ed->hwHeadP = (u32)&tds[0];
hcca->int_table[i] = (u32)ed;
}
- pipe->data = data;
- pipe->count = count;
- pipe->tds = tds;
- memcpy(&pipe->pipe, dummy, sizeof(pipe->pipe));
return &pipe->pipe;
err:
struct ohci_pipe *pipe = container_of(p, struct ohci_pipe, pipe);
struct ohci_td *tds = GET_FLATPTR(pipe->tds);
- struct ohci_td *head = (void*)GET_FLATPTR(pipe->ed.hwHeadP);
+ struct ohci_td *head = (void*)(GET_FLATPTR(pipe->ed.hwHeadP) & ~(ED_C|ED_H));
struct ohci_td *tail = (void*)GET_FLATPTR(pipe->ed.hwTailP);
int count = GET_FLATPTR(pipe->count);
int pos = (tail - tds + 1) % count;
SET_FLATPTR(tail->hwCBP, (u32)intrdata);
SET_FLATPTR(tail->hwNextTD, (u32)next);
SET_FLATPTR(tail->hwBE, (u32)intrdata + maxpacket - 1);
-
+ barrier();
SET_FLATPTR(pipe->ed.hwTailP, (u32)next);
return 0;
projects / seabios.git / blobdiff