// Support for generating ACPI tables (on emulators)
//
-// Copyright (C) 2008,2009 Kevin O'Connor <kevin@koconnor.net>
+// Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
// Copyright (C) 2006 Fabrice Bellard
//
// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "acpi.h" // struct rsdp_descriptor
#include "util.h" // memcpy
-#include "pci.h" // pci_find_device
+#include "pci.h" // pci_find_init_device
#include "biosvar.h" // GET_EBDA
#include "pci_ids.h" // PCI_VENDOR_ID_INTEL
#include "pci_regs.h" // PCI_INTERRUPT_LINE
#include "paravirt.h"
-#include "dev-i440fx.h" // piix4_fadt_init
/****************************************************/
/* ACPI tables init */
} PACKED;
+/*
+ * Differentiated System Description Table (DSDT)
+ */
+#define DSDT_SIGNATURE 0x54445344 // DSDT
+
/*
* MADT values and structures
*/
u16 flags;
} PACKED;
+struct madt_local_nmi {
+ ACPI_SUB_HEADER_DEF
+ u8 processor_id; /* ACPI processor id */
+ u16 flags; /* MPS INTI flags */
+ u8 lint; /* Local APIC LINT# */
+} PACKED;
+
+
/*
* ACPI 2.0 Generic Address Space definition.
*/
u16 min_tick;
u8 page_protect;
} PACKED;
-#define ACPI_HPET_ADDRESS 0xFED00000UL
+
+#define HPET_ID 0x000
+#define HPET_PERIOD 0x004
/*
* SRAT (NUMA topology description) table
h->revision = rev;
memcpy(h->oem_id, CONFIG_APPNAME6, 6);
memcpy(h->oem_table_id, CONFIG_APPNAME4, 4);
- memcpy(h->asl_compiler_id, CONFIG_APPNAME4, 4);
memcpy(h->oem_table_id + 4, (void*)&sig, 4);
h->oem_revision = cpu_to_le32(1);
+ memcpy(h->asl_compiler_id, CONFIG_APPNAME4, 4);
h->asl_compiler_revision = cpu_to_le32(1);
h->checksum -= checksum(h, len);
}
+#define PIIX4_ACPI_ENABLE 0xf1
+#define PIIX4_ACPI_DISABLE 0xf0
+#define PIIX4_GPE0_BLK 0xafe0
+#define PIIX4_GPE0_BLK_LEN 4
+
+static void piix4_fadt_init(struct pci_device *pci, void *arg)
+{
+ struct fadt_descriptor_rev1 *fadt = arg;
+ fadt->acpi_enable = PIIX4_ACPI_ENABLE;
+ fadt->acpi_disable = PIIX4_ACPI_DISABLE;
+ fadt->gpe0_blk = cpu_to_le32(PIIX4_GPE0_BLK);
+ fadt->gpe0_blk_len = PIIX4_GPE0_BLK_LEN;
+}
+
static const struct pci_device_id fadt_init_tbl[] = {
/* PIIX4 Power Management device (for ACPI) */
PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
PCI_DEVICE_END
};
-static void*
-build_fadt(int bdf)
+static void fill_dsdt(struct fadt_descriptor_rev1 *fadt, void *dsdt)
+{
+ if (fadt->dsdt) {
+ free((void *)le32_to_cpu(fadt->dsdt));
+ }
+ fadt->dsdt = cpu_to_le32((u32)dsdt);
+ fadt->checksum -= checksum(fadt, sizeof(*fadt));
+ dprintf(1, "ACPI DSDT=%p\n", dsdt);
+}
+
+static void *
+build_fadt(struct pci_device *pci)
{
struct fadt_descriptor_rev1 *fadt = malloc_high(sizeof(*fadt));
struct facs_descriptor_rev1 *facs = memalign_high(64, sizeof(*facs));
- void *dsdt = malloc_high(sizeof(AmlCode));
- if (!fadt || !facs || !dsdt) {
+ if (!fadt || !facs) {
warn_noalloc();
return NULL;
}
facs->signature = FACS_SIGNATURE;
facs->length = cpu_to_le32(sizeof(*facs));
- /* DSDT */
- memcpy(dsdt, AmlCode, sizeof(AmlCode));
-
/* FADT */
memset(fadt, 0, sizeof(*fadt));
fadt->firmware_ctrl = cpu_to_le32((u32)facs);
- fadt->dsdt = cpu_to_le32((u32)dsdt);
+ fadt->dsdt = 0; /* dsdt will be filled later in acpi_bios_init()
+ by fill_dsdt() */
fadt->model = 1;
fadt->reserved1 = 0;
- int pm_sci_int = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
+ int pm_sci_int = pci_config_readb(pci->bdf, PCI_INTERRUPT_LINE);
fadt->sci_int = cpu_to_le16(pm_sci_int);
fadt->smi_cmd = cpu_to_le32(PORT_SMI_CMD);
fadt->pm1a_evt_blk = cpu_to_le32(PORT_ACPI_PM_BASE);
fadt->pm_tmr_len = 4;
fadt->plvl2_lat = cpu_to_le16(0xfff); // C2 state not supported
fadt->plvl3_lat = cpu_to_le16(0xfff); // C3 state not supported
- pci_init_device(fadt_init_tbl, bdf, fadt);
- /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC */
- fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6));
+ pci_init_device(fadt_init_tbl, pci, fadt);
+ /* WBINVD + PROC_C1 + SLP_BUTTON + FIX_RTC + RTC_S4 */
+ fadt->flags = cpu_to_le32((1 << 0) | (1 << 2) | (1 << 5) | (1 << 6) | (1 << 7));
build_header((void*)fadt, FACP_SIGNATURE, sizeof(*fadt), 1);
int madt_size = (sizeof(struct multiple_apic_table)
+ sizeof(struct madt_processor_apic) * MaxCountCPUs
+ sizeof(struct madt_io_apic)
- + sizeof(struct madt_intsrcovr) * 16);
+ + sizeof(struct madt_intsrcovr) * 16
+ + sizeof(struct madt_local_nmi));
+
struct multiple_apic_table *madt = malloc_high(madt_size);
if (!madt) {
warn_noalloc();
intsrcovr++;
}
- build_header((void*)madt, APIC_SIGNATURE, (void*)intsrcovr - (void*)madt, 1);
+ struct madt_local_nmi *local_nmi = (void*)intsrcovr;
+ local_nmi->type = APIC_LOCAL_NMI;
+ local_nmi->length = sizeof(*local_nmi);
+ local_nmi->processor_id = 0xff; /* all processors */
+ local_nmi->flags = 0;
+ local_nmi->lint = 1; /* LINT1 */
+ local_nmi++;
+
+ build_header((void*)madt, APIC_SIGNATURE, (void*)local_nmi - (void*)madt, 1);
return madt;
}
+// Encode a hex value
+static inline char getHex(u32 val) {
+ val &= 0x0f;
+ return (val <= 9) ? ('0' + val) : ('A' + val - 10);
+}
+
+// Encode a length in an SSDT.
+static u8 *
+encodeLen(u8 *ssdt_ptr, int length, int bytes)
+{
+ switch (bytes) {
+ default:
+ case 4: ssdt_ptr[3] = ((length >> 20) & 0xff);
+ case 3: ssdt_ptr[2] = ((length >> 12) & 0xff);
+ case 2: ssdt_ptr[1] = ((length >> 4) & 0xff);
+ ssdt_ptr[0] = (((bytes-1) & 0x3) << 6) | (length & 0x0f);
+ break;
+ case 1: ssdt_ptr[0] = length & 0x3f;
+ }
+ return ssdt_ptr + bytes;
+}
+
+#include "ssdt-proc.hex"
+
+/* 0x5B 0x83 ProcessorOp PkgLength NameString ProcID */
+#define SD_OFFSET_CPUHEX (*ssdt_proc_name - *ssdt_proc_start + 2)
+#define SD_OFFSET_CPUID1 (*ssdt_proc_name - *ssdt_proc_start + 4)
+#define SD_OFFSET_CPUID2 (*ssdt_proc_id - *ssdt_proc_start)
+#define SD_SIZEOF (*ssdt_proc_end - *ssdt_proc_start)
+#define SD_PROC (ssdp_proc_aml + *ssdt_proc_start)
+
#define SSDT_SIGNATURE 0x54445353 // SSDT
+
static void*
build_ssdt(void)
{
int acpi_cpus = MaxCountCPUs > 0xff ? 0xff : MaxCountCPUs;
- // calculate the length of processor block and scope block
- // excluding PkgLength
- int cpu_length = 13 * acpi_cpus + 4;
-
- int length = sizeof(struct acpi_table_header) + 3 + cpu_length;
- u8 *ssdt = malloc_high(length);
+ // length = ScopeOp + procs + NTYF method + CPON package
+ int length = ((1+3+4)
+ + (acpi_cpus * SD_SIZEOF)
+ + (1+2+5+(12*acpi_cpus))
+ + (6+2+1+(1*acpi_cpus)));
+ u8 *ssdt = malloc_high(sizeof(struct acpi_table_header) + length);
if (! ssdt) {
warn_noalloc();
return NULL;
}
+ u8 *ssdt_ptr = ssdt + sizeof(struct acpi_table_header);
- u8 *ssdt_ptr = ssdt;
- ssdt_ptr[9] = 0; // checksum;
- ssdt_ptr += sizeof(struct acpi_table_header);
-
- // build processor scope header
+ // build Scope(_SB_) header
*(ssdt_ptr++) = 0x10; // ScopeOp
- if (cpu_length <= 0x3e) {
- /* Handle 1-4 CPUs with one byte encoding */
- *(ssdt_ptr++) = cpu_length + 1;
- } else {
- /* Handle 5-314 CPUs with two byte encoding */
- *(ssdt_ptr++) = 0x40 | ((cpu_length + 2) & 0xf);
- *(ssdt_ptr++) = (cpu_length + 2) >> 4;
- }
- *(ssdt_ptr++) = '_'; // Name
- *(ssdt_ptr++) = 'P';
- *(ssdt_ptr++) = 'R';
+ ssdt_ptr = encodeLen(ssdt_ptr, length-1, 3);
+ *(ssdt_ptr++) = '_';
+ *(ssdt_ptr++) = 'S';
+ *(ssdt_ptr++) = 'B';
*(ssdt_ptr++) = '_';
- // build object for each processor
+ // build Processor object for each processor
int i;
for (i=0; i<acpi_cpus; i++) {
- *(ssdt_ptr++) = 0x5B; // ProcessorOp
- *(ssdt_ptr++) = 0x83;
- *(ssdt_ptr++) = 0x0B; // Length
- *(ssdt_ptr++) = 'C'; // Name (CPUxx)
- *(ssdt_ptr++) = 'P';
- if ((i & 0xf0) != 0)
- *(ssdt_ptr++) = (i >> 4) < 0xa ? (i >> 4) + '0' : (i >> 4) + 'A' - 0xa;
- else
- *(ssdt_ptr++) = 'U';
- *(ssdt_ptr++) = (i & 0xf) < 0xa ? (i & 0xf) + '0' : (i & 0xf) + 'A' - 0xa;
+ memcpy(ssdt_ptr, SD_PROC, SD_SIZEOF);
+ ssdt_ptr[SD_OFFSET_CPUHEX] = getHex(i >> 4);
+ ssdt_ptr[SD_OFFSET_CPUHEX+1] = getHex(i);
+ ssdt_ptr[SD_OFFSET_CPUID1] = i;
+ ssdt_ptr[SD_OFFSET_CPUID2] = i;
+ ssdt_ptr += SD_SIZEOF;
+ }
+
+ // build "Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}"
+ *(ssdt_ptr++) = 0x14; // MethodOp
+ ssdt_ptr = encodeLen(ssdt_ptr, 2+5+(12*acpi_cpus), 2);
+ *(ssdt_ptr++) = 'N';
+ *(ssdt_ptr++) = 'T';
+ *(ssdt_ptr++) = 'F';
+ *(ssdt_ptr++) = 'Y';
+ *(ssdt_ptr++) = 0x02;
+ for (i=0; i<acpi_cpus; i++) {
+ *(ssdt_ptr++) = 0xA0; // IfOp
+ ssdt_ptr = encodeLen(ssdt_ptr, 11, 1);
+ *(ssdt_ptr++) = 0x93; // LEqualOp
+ *(ssdt_ptr++) = 0x68; // Arg0Op
+ *(ssdt_ptr++) = 0x0A; // BytePrefix
*(ssdt_ptr++) = i;
- *(ssdt_ptr++) = 0x10; // Processor block address
- *(ssdt_ptr++) = 0xb0;
- *(ssdt_ptr++) = 0;
- *(ssdt_ptr++) = 0;
- *(ssdt_ptr++) = 6; // Processor block length
+ *(ssdt_ptr++) = 0x86; // NotifyOp
+ *(ssdt_ptr++) = 'C';
+ *(ssdt_ptr++) = 'P';
+ *(ssdt_ptr++) = getHex(i >> 4);
+ *(ssdt_ptr++) = getHex(i);
+ *(ssdt_ptr++) = 0x69; // Arg1Op
}
+ // build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
+ *(ssdt_ptr++) = 0x08; // NameOp
+ *(ssdt_ptr++) = 'C';
+ *(ssdt_ptr++) = 'P';
+ *(ssdt_ptr++) = 'O';
+ *(ssdt_ptr++) = 'N';
+ *(ssdt_ptr++) = 0x12; // PackageOp
+ ssdt_ptr = encodeLen(ssdt_ptr, 2+1+(1*acpi_cpus), 2);
+ *(ssdt_ptr++) = acpi_cpus;
+ for (i=0; i<acpi_cpus; i++)
+ *(ssdt_ptr++) = (i < CountCPUs) ? 0x01 : 0x00;
+
build_header((void*)ssdt, SSDT_SIGNATURE, ssdt_ptr - ssdt, 1);
+ //hexdump(ssdt, ssdt_ptr - ssdt);
+
+ return ssdt;
+}
+
+#include "ssdt-pcihp.hex"
+
+#define PCI_RMV_BASE 0xae0c
+
+extern void link_time_assertion(void);
+
+static void* build_pcihp(void)
+{
+ u32 rmvc_pcrm;
+ int i;
+
+ u8 *ssdt = malloc_high(sizeof ssdp_pcihp_aml);
+ memcpy(ssdt, ssdp_pcihp_aml, sizeof ssdp_pcihp_aml);
+
+ /* Runtime patching of EJ0: to disable hotplug for a slot,
+ * replace the method name: _EJ0 by EJ0_. */
+ if (ARRAY_SIZE(aml_ej0_name) != ARRAY_SIZE(aml_adr_dword)) {
+ link_time_assertion();
+ }
+
+ rmvc_pcrm = inl(PCI_RMV_BASE);
+ for (i = 0; i < ARRAY_SIZE(aml_ej0_name); ++i) {
+ /* Slot is in byte 2 in _ADR */
+ u8 slot = ssdp_pcihp_aml[aml_adr_dword[i] + 2] & 0x1F;
+ /* Sanity check */
+ if (memcmp(ssdp_pcihp_aml + aml_ej0_name[i], "_EJ0", 4)) {
+ warn_internalerror();
+ free(ssdt);
+ return NULL;
+ }
+ if (!(rmvc_pcrm & (0x1 << slot))) {
+ memcpy(ssdt + aml_ej0_name[i], "EJ0_", 4);
+ }
+ }
+
return ssdt;
}
-#define HPET_SIGNATURE 0x54455048 //HPET
+#define HPET_SIGNATURE 0x54455048 // HPET
static void*
build_hpet(void)
{
- struct acpi_20_hpet *hpet = malloc_high(sizeof(*hpet));
+ struct acpi_20_hpet *hpet;
+ const void *hpet_base = (void *)BUILD_HPET_ADDRESS;
+ u32 hpet_vendor = readl(hpet_base + HPET_ID) >> 16;
+ u32 hpet_period = readl(hpet_base + HPET_PERIOD);
+
+ if (hpet_vendor == 0 || hpet_vendor == 0xffff ||
+ hpet_period == 0 || hpet_period > 100000000)
+ return NULL;
+
+ hpet = malloc_high(sizeof(*hpet));
if (!hpet) {
warn_noalloc();
return NULL;
* emulated hpet
*/
hpet->timer_block_id = cpu_to_le32(0x8086a201);
- hpet->addr.address = cpu_to_le32(ACPI_HPET_ADDRESS);
+ hpet->addr.address = cpu_to_le32(BUILD_HPET_ADDRESS);
build_header((void*)hpet, HPET_SIGNATURE, sizeof(*hpet), 1);
return hpet;
{
numamem->type = SRAT_MEMORY;
numamem->length = sizeof(*numamem);
- memset (numamem->proximity, 0 ,4);
+ memset(numamem->proximity, 0 ,4);
numamem->proximity[0] = node;
numamem->flags = cpu_to_le32(!!enabled);
numamem->base_addr_low = base & 0xFFFFFFFF;
numamem->length_high = len >> 32;
}
-#define SRAT_SIGNATURE 0x54415253 //HPET
+#define SRAT_SIGNATURE 0x54415253 // SRAT
static void *
build_srat(void)
{
dprintf(3, "init ACPI tables\n");
// This code is hardcoded for PIIX4 Power Management device.
- int bdf = pci_find_init_device(acpi_find_tbl, NULL);
- if (bdf < 0)
+ struct pci_device *pci = pci_find_init_device(acpi_find_tbl, NULL);
+ if (!pci)
// Device not found
return;
- // Create initial rsdt table
- struct rsdp_descriptor *rsdp = malloc_fseg(sizeof(*rsdp));
- if (!rsdp) {
- warn_noalloc();
- return;
- }
-
+ // Build ACPI tables
u32 tables[MAX_ACPI_TABLES], tbl_idx = 0;
#define ACPI_INIT_TABLE(X) \
tbl_idx++; \
} while(0)
- // Add tables
- ACPI_INIT_TABLE(build_fadt(bdf));
+ struct fadt_descriptor_rev1 *fadt = build_fadt(pci);
+ ACPI_INIT_TABLE(fadt);
ACPI_INIT_TABLE(build_ssdt());
ACPI_INIT_TABLE(build_madt());
ACPI_INIT_TABLE(build_hpet());
ACPI_INIT_TABLE(build_srat());
+ ACPI_INIT_TABLE(build_pcihp());
u16 i, external_tables = qemu_cfg_acpi_additional_tables();
- for(i = 0; i < external_tables; i++) {
+ for (i = 0; i < external_tables; i++) {
u16 len = qemu_cfg_next_acpi_table_len();
void *addr = malloc_high(len);
if (!addr) {
warn_noalloc();
continue;
}
- ACPI_INIT_TABLE(qemu_cfg_next_acpi_table_load(addr, len));
+ struct acpi_table_header *header =
+ qemu_cfg_next_acpi_table_load(addr, len);
+ if (header->signature == DSDT_SIGNATURE) {
+ if (fadt) {
+ fill_dsdt(fadt, addr);
+ }
+ } else {
+ ACPI_INIT_TABLE(header);
+ }
if (tbl_idx == MAX_ACPI_TABLES) {
warn_noalloc();
break;
}
}
+ if (fadt && !fadt->dsdt) {
+ /* default DSDT */
+ void *dsdt = malloc_high(sizeof(AmlCode));
+ if (!dsdt) {
+ warn_noalloc();
+ return;
+ }
+ memcpy(dsdt, AmlCode, sizeof(AmlCode));
+ fill_dsdt(fadt, dsdt);
+ }
+ // Build final rsdt table
struct rsdt_descriptor_rev1 *rsdt;
size_t rsdt_len = sizeof(*rsdt) + sizeof(u32) * tbl_idx;
rsdt = malloc_high(rsdt_len);
-
if (!rsdt) {
warn_noalloc();
return;
}
memset(rsdt, 0, rsdt_len);
memcpy(rsdt->table_offset_entry, tables, sizeof(u32) * tbl_idx);
-
build_header((void*)rsdt, RSDT_SIGNATURE, rsdt_len, 1);
// Build rsdp pointer table
+ struct rsdp_descriptor *rsdp = malloc_fseg(sizeof(*rsdp));
+ if (!rsdp) {
+ warn_noalloc();
+ return;
+ }
memset(rsdp, 0, sizeof(*rsdp));
rsdp->signature = RSDP_SIGNATURE;
memcpy(rsdp->oem_id, CONFIG_APPNAME6, 6);
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