-/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */\r
-/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */\r
-/* ELIGIBILITY FOR ANY PURPOSES. */\r
-/* (C) Fujitsu Microelectronics Europe GmbH */\r
-/*------------------------------------------------------------------------\r
- VECTORS.C\r
- - Interrupt level (priority) setting\r
- - Interrupt vector definition\r
-\r
- 31.04.05 1.00 UMa Initial Version\r
- 08.11.05 1.01 MSt SWB Mondeb switch for ICR00 Register added\r
- 27.02.06 1.02 UMa added comment in DefaultIRQHandler \r
- 17.03.06 1.03 UMa comment out ICR01\r
- 28.07.06 1.04 UMa changed comment\r
- 06.10.06 1.05 UMa changed DefaultIRQHandler\r
--------------------------------------------------------------------------*/\r
-\r
-#include "mb91465k.h"\r
-#include "RLT.h"\r
-\r
-/*------------------------------------------------------------------------\r
- InitIrqLevels()\r
-\r
- This function pre-sets all interrupt control registers. It can be used\r
- to set all interrupt priorities in static applications. If this file\r
- contains assignments to dedicated resources, verify that the\r
- appropriate controller is used. Not all devices of the MB91460 Series\r
- offer all recources.\r
-\r
- NOTE: value 31 disables the interrupt and value 16 sets highest priority.\r
--------------------------------------------------------------------------*/\r
-void InitIrqLevels(void)\r
-{\r
- /* ICRxx */ \r
-/* Softune Workbench Monitor Debugger is using ext int0 for abort function */\r
-/* ICR00 = 31; *//* External Interrupt 0 */\r
- /* External Interrupt 1 */ \r
- ICR01 = 31; /* External Interrupt 2 */\r
- /* External Interrupt 3 */\r
- ICR02 = 31; /* External Interrupt 4 */\r
- /* External Interrupt 5 */\r
- ICR03 = 31; /* External Interrupt 6 */\r
- /* External Interrupt 7 */\r
- ICR04 = 31; /* External Interrupt 8 */\r
- /* External Interrupt 9 */\r
- ICR05 = 31; /* External Interrupt 10 */\r
- /* External Interrupt 11 */\r
- ICR06 = 31; /* External Interrupt 12 */\r
- /* External Interrupt 13 */\r
- ICR07 = 31; /* External Interrupt 14 */\r
- /* External Interrupt 15 */\r
- ICR08 = 30; /* Reload Timer 0 */\r
- /* Reload Timer 1 */\r
- ICR09 = 31; /* Reload Timer 2 */\r
- /* Reload Timer 3 */\r
- ICR10 = 31; /* Reload Timer 4 */\r
- /* Reload Timer 5 */\r
- ICR11 = 31; /* Reload Timer 6 */\r
- /* Reload Timer 7 */\r
- ICR12 = 31; /* Free Run Timer 0 */\r
- /* Free Run Timer 1 */\r
- ICR13 = 31; /* Free Run Timer 2 */\r
- /* Free Run Timer 3 */\r
- ICR14 = 31; /* Free Run Timer 4 */\r
- /* Free Run Timer 5 */\r
- ICR15 = 31; /* Free Run Timer 6 */\r
- /* Free Run Timer 7 */\r
- ICR16 = 31; /* CAN 0 */\r
- /* CAN 1 */\r
- ICR17 = 31; /* CAN 2 */\r
- /* CAN 3 */\r
- ICR18 = 31; /* CAN 4 */\r
- /* CAN 5 */\r
- ICR19 = 31; /* USART (LIN) 0 RX */\r
- /* USART (LIN) 0 TX */\r
- ICR20 = 31; /* USART (LIN) 1 RX */\r
- /* USART (LIN) 1 TX */\r
- ICR21 = 31; /* USART (LIN) 2 RX */\r
- /* USART (LIN) 2 TX */\r
- ICR22 = 31; /* USART (LIN) 3 RX */\r
- /* USART (LIN) 3 TX */\r
- ICR23 = 31; /* System Reserved */\r
- /* Delayed Interrupt */\r
- ICR24 = 31; /* System Reserved */\r
- /* System Reserved */\r
- ICR25 = 31; /* USART (LIN, FIFO) 4 RX */\r
- /* USART (LIN, FIFO) 4 TX */\r
- ICR26 = 31; /* USART (LIN, FIFO) 5 RX */\r
- /* USART (LIN, FIFO) 5 TX */\r
- ICR27 = 31; /* USART (LIN, FIFO) 6 RX */\r
- /* USART (LIN, FIFO) 6 TX */\r
- ICR28 = 31; /* USART (LIN, FIFO) 7 RX */\r
- /* USART (LIN, FIFO) 7 TX */\r
- ICR29 = 31; /* I2C 0 / I2C 2 */\r
- /* I2C 1 / I2C 3 */\r
- ICR30 = 31; /* USART (LIN, FIFO) 8 RX */\r
- /* USART (LIN, FIFO) 8 TX */\r
- ICR31 = 31; /* USART (LIN, FIFO) 9 RX */\r
- /* USART (LIN, FIFO) 9 TX */\r
- ICR32 = 31; /* USART (LIN, FIFO) 10 RX */\r
- /* USART (LIN, FIFO) 10 TX */\r
- ICR33 = 31; /* USART (LIN, FIFO) 11 RX */\r
- /* USART (LIN, FIFO) 11 TX */\r
- ICR34 = 31; /* USART (LIN, FIFO) 12 RX */\r
- /* USART (LIN, FIFO) 12 TX */\r
- ICR35 = 31; /* USART (LIN, FIFO) 13 RX */\r
- /* USART (LIN, FIFO) 13 TX */\r
- ICR36 = 31; /* USART (LIN, FIFO) 14 RX */\r
- /* USART (LIN, FIFO) 14 TX */\r
- ICR37 = 31; /* USART (LIN, FIFO) 15 RX */\r
- /* USART (LIN, FIFO) 15 TX */\r
- ICR38 = 31; /* Input Capture 0 */\r
- /* Input Capture 1 */\r
- ICR39 = 31; /* Input Capture 2 */\r
- /* Input Capture 3 */\r
- ICR40 = 31; /* Input Capture 4 */\r
- /* Input Capture 5 */\r
- ICR41 = 31; /* Input Capture 6 */\r
- /* Input Capture 7 */\r
- ICR42 = 31; /* Output Compare 0 */\r
- /* Output Compare 1 */\r
- ICR43 = 31; /* Output Compare 2 */\r
- /* Output Compare 3 */\r
- ICR44 = 31; /* Output Compare 4 */\r
- /* Output Compare 5 */\r
- ICR45 = 31; /* Output Compare 6 */\r
- /* Output Compare 7 */\r
- ICR46 = 31; /* Sound Generator */\r
- /* Phase Frequ. Modulator */\r
- ICR47 = 31; /* System Reserved */\r
- /* System Reserved */\r
- ICR48 = 31; /* Prog. Pulse Gen. 0 */\r
- /* Prog. Pulse Gen. 1 */\r
- ICR49 = 31; /* Prog. Pulse Gen. 2 */\r
- /* Prog. Pulse Gen. 3 */\r
- ICR50 = 31; /* Prog. Pulse Gen. 4 */\r
- /* Prog. Pulse Gen. 5 */\r
- ICR51 = 31; /* Prog. Pulse Gen. 6 */\r
- /* Prog. Pulse Gen. 7 */\r
- ICR52 = 31; /* Prog. Pulse Gen. 8 */\r
- /* Prog. Pulse Gen. 9 */\r
- ICR53 = 31; /* Prog. Pulse Gen. 10 */\r
- /* Prog. Pulse Gen. 11 */\r
- ICR54 = 31; /* Prog. Pulse Gen. 12 */\r
- /* Prog. Pulse Gen. 13 */\r
- ICR55 = 31; /* Prog. Pulse Gen. 14 */\r
- /* Prog. Pulse Gen. 15 */\r
- ICR56 = 31; /* Up/Down Counter 0 */\r
- /* Up/Down Counter 1 */\r
- ICR57 = 31; /* Up/Down Counter 2 */\r
- /* Up/Down Counter 3 */\r
- ICR58 = 31; /* Real Time Clock */\r
- /* Calibration Unit */\r
- ICR59 = 31; /* A/D Converter 0 */\r
- /* - */\r
- ICR60 = 31; /* Alarm Comperator 0 */\r
- /* Alarm Comperator 1 */\r
- ICR61 = 31; /* Low Volage Detector */\r
- /* SMC Zero Point 0-5 */\r
- ICR62 = 31; /* Timebase Overflow */\r
- /* PLL Clock Gear */\r
- ICR63 = 31; /* DMA Controller */\r
- /* Main/Sub OSC stability wait */\r
-}\r
-\r
-\r
-\r
-/*------------------------------------------------------------------------\r
- Prototypes\r
- \r
- Add your own prototypes here. Each vector definition needs is proto-\r
- type. Either do it here or include a header file containing them.\r
--------------------------------------------------------------------------*/\r
-__interrupt void DefaultIRQHandler (void);\r
-__interrupt void RLT_Channel0_ISR (void);\r
-\r
-\r
-/*------------------------------------------------------------------------\r
- Vector definiton\r
-\r
- Use following statements to define vectors. All resource related\r
- vectors are predefined. Remaining software interrupts can be added here\r
- as well.\r
-------------------------------------------------------------------------*/\r
-#pragma intvect 0xBFF8 0 /* (fixed) reset vector */\r
-#pragma intvect 0x06000000 1 /* (fixed) Mode Byte */\r
-\r
-#pragma intvect DefaultIRQHandler 15 /* Non Maskable Interrupt */\r
-#pragma intvect DefaultIRQHandler 16 /* External Interrupt 0 */\r
-#pragma intvect DefaultIRQHandler 17 /* External Interrupt 1 */\r
-#pragma intvect DefaultIRQHandler 18 /* External Interrupt 2 */\r
-#pragma intvect DefaultIRQHandler 19 /* External Interrupt 3 */\r
-#pragma intvect DefaultIRQHandler 20 /* External Interrupt 4 */\r
-#pragma intvect DefaultIRQHandler 21 /* External Interrupt 5 */\r
-#pragma intvect DefaultIRQHandler 22 /* External Interrupt 6 */\r
-#pragma intvect DefaultIRQHandler 23 /* External Interrupt 7 */\r
-#pragma intvect DefaultIRQHandler 24 /* External Interrupt 8 */\r
-#pragma intvect DefaultIRQHandler 25 /* External Interrupt 9 */\r
-#pragma intvect DefaultIRQHandler 26 /* External Interrupt 10 */\r
-#pragma intvect DefaultIRQHandler 27 /* External Interrupt 11 */\r
-#pragma intvect DefaultIRQHandler 28 /* External Interrupt 12 */\r
-#pragma intvect DefaultIRQHandler 29 /* External Interrupt 13 */\r
-#pragma intvect DefaultIRQHandler 30 /* External Interrupt 14 */\r
-#pragma intvect DefaultIRQHandler 31 /* External Interrupt 15 */\r
-#pragma intvect RLT_Channel0_ISR 32 /* Reload Timer 0 */\r
-#pragma intvect DefaultIRQHandler 33 /* Reload Timer 1 */\r
-#pragma intvect DefaultIRQHandler 34 /* Reload Timer 2 */\r
-#pragma intvect DefaultIRQHandler 35 /* Reload Timer 3 */\r
-#pragma intvect DefaultIRQHandler 36 /* Reload Timer 4 */\r
-#pragma intvect DefaultIRQHandler 37 /* Reload Timer 5 */\r
-#pragma intvect DefaultIRQHandler 38 /* Reload Timer 6 */\r
-#pragma intvect DefaultIRQHandler 39 /* Reload Timer 7 */\r
-#pragma intvect DefaultIRQHandler 40 /* Free Run Timer 0 */\r
-#pragma intvect DefaultIRQHandler 41 /* Free Run Timer 1 */\r
-#pragma intvect DefaultIRQHandler 42 /* Free Run Timer 2 */\r
-#pragma intvect DefaultIRQHandler 43 /* Free Run Timer 3 */\r
-#pragma intvect DefaultIRQHandler 44 /* Free Run Timer 4 */\r
-#pragma intvect DefaultIRQHandler 45 /* Free Run Timer 5 */\r
-#pragma intvect DefaultIRQHandler 46 /* Free Run Timer 6 */\r
-#pragma intvect DefaultIRQHandler 47 /* Free Run Timer 7 */\r
-#pragma intvect DefaultIRQHandler 48 /* CAN 0 */\r
-#pragma intvect DefaultIRQHandler 49 /* CAN 1 */\r
-#pragma intvect DefaultIRQHandler 50 /* CAN 2 */\r
-#pragma intvect DefaultIRQHandler 51 /* CAN 3 */\r
-#pragma intvect DefaultIRQHandler 52 /* CAN 4 */\r
-#pragma intvect DefaultIRQHandler 53 /* CAN 5 */\r
-#pragma intvect DefaultIRQHandler 54 /* USART (LIN) 0 RX */\r
-#pragma intvect DefaultIRQHandler 55 /* USART (LIN) 0 TX */\r
-#pragma intvect DefaultIRQHandler 56 /* USART (LIN) 1 RX */\r
-#pragma intvect DefaultIRQHandler 57 /* USART (LIN) 1 TX */\r
-#pragma intvect DefaultIRQHandler 58 /* USART (LIN) 2 RX */\r
-#pragma intvect DefaultIRQHandler 59 /* USART (LIN) 2 TX */\r
-#pragma intvect DefaultIRQHandler 60 /* USART (LIN) 3 RX */\r
-#pragma intvect DefaultIRQHandler 61 /* USART (LIN) 3 TX */\r
-#pragma intvect DefaultIRQHandler 62 /* System Reserved */\r
-#pragma intvect DefaultIRQHandler 63 /* Delayed Interrupt */\r
-#pragma intvect DefaultIRQHandler 64 /* System Reserved */\r
-#pragma intvect DefaultIRQHandler 65 /* System Reserved */\r
-#pragma intvect DefaultIRQHandler 66 /* USART (LIN, FIFO) 4 RX */\r
-#pragma intvect DefaultIRQHandler 67 /* USART (LIN, FIFO) 4 TX */\r
-#pragma intvect DefaultIRQHandler 68 /* USART (LIN, FIFO) 5 RX */\r
-#pragma intvect DefaultIRQHandler 69 /* USART (LIN, FIFO) 5 TX */\r
-#pragma intvect DefaultIRQHandler 70 /* USART (LIN, FIFO) 6 RX */\r
-#pragma intvect DefaultIRQHandler 71 /* USART (LIN, FIFO) 6 TX */\r
-#pragma intvect DefaultIRQHandler 72 /* USART (LIN, FIFO) 7 RX */\r
-#pragma intvect DefaultIRQHandler 73 /* USART (LIN, FIFO) 7 TX */\r
-#pragma intvect DefaultIRQHandler 74 /* I2C 0 / I2C 2 */\r
-#pragma intvect DefaultIRQHandler 75 /* I2C 1 / I2C 3 */\r
-#pragma intvect DefaultIRQHandler 76 /* USART (LIN, FIFO) 8 RX */\r
-#pragma intvect DefaultIRQHandler 77 /* USART (LIN, FIFO) 8 TX */\r
-#pragma intvect DefaultIRQHandler 78 /* USART (LIN, FIFO) 9 RX */\r
-#pragma intvect DefaultIRQHandler 79 /* USART (LIN, FIFO) 9 TX */\r
-#pragma intvect DefaultIRQHandler 80 /* USART (LIN, FIFO) 10 RX */\r
-#pragma intvect DefaultIRQHandler 81 /* USART (LIN, FIFO) 10 TX */\r
-#pragma intvect DefaultIRQHandler 82 /* USART (LIN, FIFO) 11 RX */\r
-#pragma intvect DefaultIRQHandler 83 /* USART (LIN, FIFO) 11 TX */\r
-#pragma intvect DefaultIRQHandler 84 /* USART (LIN, FIFO) 12 RX */\r
-#pragma intvect DefaultIRQHandler 85 /* USART (LIN, FIFO) 12 TX */\r
-#pragma intvect DefaultIRQHandler 86 /* USART (LIN, FIFO) 13 RX */\r
-#pragma intvect DefaultIRQHandler 87 /* USART (LIN, FIFO) 13 TX */\r
-#pragma intvect DefaultIRQHandler 88 /* USART (LIN, FIFO) 14 RX */\r
-#pragma intvect DefaultIRQHandler 89 /* USART (LIN, FIFO) 14 TX */\r
-#pragma intvect DefaultIRQHandler 90 /* USART (LIN, FIFO) 15 RX */\r
-#pragma intvect DefaultIRQHandler 91 /* USART (LIN, FIFO) 15 TX */\r
-#pragma intvect DefaultIRQHandler 92 /* Input Capture 0 */\r
-#pragma intvect DefaultIRQHandler 93 /* Input Capture 1 */\r
-#pragma intvect DefaultIRQHandler 94 /* Input Capture 2 */\r
-#pragma intvect DefaultIRQHandler 95 /* Input Capture 3 */\r
-#pragma intvect DefaultIRQHandler 96 /* Input Capture 4 */\r
-#pragma intvect DefaultIRQHandler 97 /* Input Capture 5 */\r
-#pragma intvect DefaultIRQHandler 98 /* Input Capture 6 */\r
-#pragma intvect DefaultIRQHandler 99 /* Input Capture 7 */\r
-#pragma intvect DefaultIRQHandler 100 /* Output Compare 0 */\r
-#pragma intvect DefaultIRQHandler 101 /* Output Compare 1 */\r
-#pragma intvect DefaultIRQHandler 102 /* Output Compare 2 */\r
-#pragma intvect DefaultIRQHandler 103 /* Output Compare 3 */\r
-#pragma intvect DefaultIRQHandler 104 /* Output Compare 4 */\r
-#pragma intvect DefaultIRQHandler 105 /* Output Compare 5 */\r
-#pragma intvect DefaultIRQHandler 106 /* Output Compare 6 */\r
-#pragma intvect DefaultIRQHandler 107 /* Output Compare 7 */\r
-#pragma intvect DefaultIRQHandler 108 /* Sound Generator */\r
-#pragma intvect DefaultIRQHandler 109 /* Phase Frequ. Modulator */\r
-#pragma intvect DefaultIRQHandler 110 /* System Reserved */\r
-#pragma intvect DefaultIRQHandler 111 /* System Reserved */\r
-#pragma intvect DefaultIRQHandler 112 /* Prog. Pulse Gen. 0 */\r
-#pragma intvect DefaultIRQHandler 113 /* Prog. Pulse Gen. 1 */\r
-#pragma intvect DefaultIRQHandler 114 /* Prog. Pulse Gen. 2 */\r
-#pragma intvect DefaultIRQHandler 115 /* Prog. Pulse Gen. 3 */\r
-#pragma intvect DefaultIRQHandler 116 /* Prog. Pulse Gen. 4 */\r
-#pragma intvect DefaultIRQHandler 117 /* Prog. Pulse Gen. 5 */\r
-#pragma intvect DefaultIRQHandler 118 /* Prog. Pulse Gen. 6 */\r
-#pragma intvect DefaultIRQHandler 119 /* Prog. Pulse Gen. 7 */\r
-#pragma intvect DefaultIRQHandler 120 /* Prog. Pulse Gen. 8 */\r
-#pragma intvect DefaultIRQHandler 121 /* Prog. Pulse Gen. 9 */\r
-#pragma intvect DefaultIRQHandler 122 /* Prog. Pulse Gen. 10 */\r
-#pragma intvect DefaultIRQHandler 123 /* Prog. Pulse Gen. 11 */\r
-#pragma intvect DefaultIRQHandler 124 /* Prog. Pulse Gen. 12 */\r
-#pragma intvect DefaultIRQHandler 125 /* Prog. Pulse Gen. 13 */\r
-#pragma intvect DefaultIRQHandler 126 /* Prog. Pulse Gen. 14 */\r
-#pragma intvect DefaultIRQHandler 127 /* Prog. Pulse Gen. 15 */\r
-#pragma intvect DefaultIRQHandler 128 /* Up/Down Counter 0 */\r
-#pragma intvect DefaultIRQHandler 129 /* Up/Down Counter 1 */\r
-#pragma intvect DefaultIRQHandler 130 /* Up/Down Counter 2 */\r
-#pragma intvect DefaultIRQHandler 131 /* Up/Down Counter 3 */\r
-#pragma intvect DefaultIRQHandler 132 /* Real Time Clock */\r
-#pragma intvect DefaultIRQHandler 133 /* Calibration Unit */\r
-#pragma intvect DefaultIRQHandler 134 /* A/D Converter 0 */\r
-#pragma intvect DefaultIRQHandler 135 /* - */\r
-#pragma intvect DefaultIRQHandler 136 /* Alarm Comperator 0 */\r
-#pragma intvect DefaultIRQHandler 137 /* Alarm Comperator 1 */\r
-#pragma intvect DefaultIRQHandler 138 /* Low Volage Detector */\r
-#pragma intvect DefaultIRQHandler 139 /* SMC Zero Point 0-5 */\r
-#pragma intvect DefaultIRQHandler 140 /* Timebase Overflow */\r
-#pragma intvect DefaultIRQHandler 141 /* PLL Clock Gear */\r
-#pragma intvect DefaultIRQHandler 142 /* DMA Controller */\r
-#pragma intvect DefaultIRQHandler 143 /* Main/Sub OSC stability wait */\r
-#pragma intvect 0xFFFFFFFF 144 /* Boot Sec. Vector (MB91V460A) */\r
-\r
-\r
-\r
-/*------------------------------------------------------------------------\r
- DefaultIRQHandler()\r
-\r
- This function is a placeholder for all vector definitions. Either use\r
- your own placeholder or add necessary code here. \r
--------------------------------------------------------------------------*/\r
-__interrupt \r
-void DefaultIRQHandler (void)\r
-{\r
- /* RB_SYNC; */ /* Synchronisation with R-Bus */\r
- /* May be required, if there is */\r
- /* no R-Bus access after the */\r
- /* reset of the interrupt flag */\r
-\r
- __DI(); /* disable interrupts */\r
- while(1)\r
- HWWD_CL = 0; /* feed hardware watchdog */\r
- /* halt system */\r
-}\r
+/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
+/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
+/* ELIGIBILITY FOR ANY PURPOSES. */
+/* (C) Fujitsu Microelectronics Europe GmbH */
+/*------------------------------------------------------------------------
+ VECTORS.C
+ - Interrupt level (priority) setting
+ - Interrupt vector definition
+
+ 31.04.05 1.00 UMa Initial Version
+ 08.11.05 1.01 MSt SWB Mondeb switch for ICR00 Register added
+ 27.02.06 1.02 UMa added comment in DefaultIRQHandler
+ 17.03.06 1.03 UMa comment out ICR01
+ 28.07.06 1.04 UMa changed comment
+ 06.10.06 1.05 UMa changed DefaultIRQHandler
+-------------------------------------------------------------------------*/
+
+#include "mb91465k.h"
+#include "RLT.h"
+
+/*------------------------------------------------------------------------
+ InitIrqLevels()
+
+ This function pre-sets all interrupt control registers. It can be used
+ to set all interrupt priorities in static applications. If this file
+ contains assignments to dedicated resources, verify that the
+ appropriate controller is used. Not all devices of the MB91460 Series
+ offer all recources.
+
+ NOTE: value 31 disables the interrupt and value 16 sets highest priority.
+-------------------------------------------------------------------------*/
+void InitIrqLevels(void)
+{
+ /* ICRxx */
+/* Softune Workbench Monitor Debugger is using ext int0 for abort function */
+/* ICR00 = 31; *//* External Interrupt 0 */
+ /* External Interrupt 1 */
+ ICR01 = 31; /* External Interrupt 2 */
+ /* External Interrupt 3 */
+ ICR02 = 31; /* External Interrupt 4 */
+ /* External Interrupt 5 */
+ ICR03 = 31; /* External Interrupt 6 */
+ /* External Interrupt 7 */
+ ICR04 = 31; /* External Interrupt 8 */
+ /* External Interrupt 9 */
+ ICR05 = 31; /* External Interrupt 10 */
+ /* External Interrupt 11 */
+ ICR06 = 31; /* External Interrupt 12 */
+ /* External Interrupt 13 */
+ ICR07 = 31; /* External Interrupt 14 */
+ /* External Interrupt 15 */
+ ICR08 = 30; /* Reload Timer 0 */
+ /* Reload Timer 1 */
+ ICR09 = 31; /* Reload Timer 2 */
+ /* Reload Timer 3 */
+ ICR10 = 31; /* Reload Timer 4 */
+ /* Reload Timer 5 */
+ ICR11 = 31; /* Reload Timer 6 */
+ /* Reload Timer 7 */
+ ICR12 = 31; /* Free Run Timer 0 */
+ /* Free Run Timer 1 */
+ ICR13 = 31; /* Free Run Timer 2 */
+ /* Free Run Timer 3 */
+ ICR14 = 31; /* Free Run Timer 4 */
+ /* Free Run Timer 5 */
+ ICR15 = 31; /* Free Run Timer 6 */
+ /* Free Run Timer 7 */
+ ICR16 = 31; /* CAN 0 */
+ /* CAN 1 */
+ ICR17 = 31; /* CAN 2 */
+ /* CAN 3 */
+ ICR18 = 31; /* CAN 4 */
+ /* CAN 5 */
+ ICR19 = 31; /* USART (LIN) 0 RX */
+ /* USART (LIN) 0 TX */
+ ICR20 = 31; /* USART (LIN) 1 RX */
+ /* USART (LIN) 1 TX */
+ ICR21 = 31; /* USART (LIN) 2 RX */
+ /* USART (LIN) 2 TX */
+ ICR22 = 31; /* USART (LIN) 3 RX */
+ /* USART (LIN) 3 TX */
+ ICR23 = 31; /* System Reserved */
+ /* Delayed Interrupt */
+ ICR24 = 31; /* System Reserved */
+ /* System Reserved */
+ ICR25 = 31; /* USART (LIN, FIFO) 4 RX */
+ /* USART (LIN, FIFO) 4 TX */
+ ICR26 = 31; /* USART (LIN, FIFO) 5 RX */
+ /* USART (LIN, FIFO) 5 TX */
+ ICR27 = 31; /* USART (LIN, FIFO) 6 RX */
+ /* USART (LIN, FIFO) 6 TX */
+ ICR28 = 31; /* USART (LIN, FIFO) 7 RX */
+ /* USART (LIN, FIFO) 7 TX */
+ ICR29 = 31; /* I2C 0 / I2C 2 */
+ /* I2C 1 / I2C 3 */
+ ICR30 = 31; /* USART (LIN, FIFO) 8 RX */
+ /* USART (LIN, FIFO) 8 TX */
+ ICR31 = 31; /* USART (LIN, FIFO) 9 RX */
+ /* USART (LIN, FIFO) 9 TX */
+ ICR32 = 31; /* USART (LIN, FIFO) 10 RX */
+ /* USART (LIN, FIFO) 10 TX */
+ ICR33 = 31; /* USART (LIN, FIFO) 11 RX */
+ /* USART (LIN, FIFO) 11 TX */
+ ICR34 = 31; /* USART (LIN, FIFO) 12 RX */
+ /* USART (LIN, FIFO) 12 TX */
+ ICR35 = 31; /* USART (LIN, FIFO) 13 RX */
+ /* USART (LIN, FIFO) 13 TX */
+ ICR36 = 31; /* USART (LIN, FIFO) 14 RX */
+ /* USART (LIN, FIFO) 14 TX */
+ ICR37 = 31; /* USART (LIN, FIFO) 15 RX */
+ /* USART (LIN, FIFO) 15 TX */
+ ICR38 = 31; /* Input Capture 0 */
+ /* Input Capture 1 */
+ ICR39 = 31; /* Input Capture 2 */
+ /* Input Capture 3 */
+ ICR40 = 31; /* Input Capture 4 */
+ /* Input Capture 5 */
+ ICR41 = 31; /* Input Capture 6 */
+ /* Input Capture 7 */
+ ICR42 = 31; /* Output Compare 0 */
+ /* Output Compare 1 */
+ ICR43 = 31; /* Output Compare 2 */
+ /* Output Compare 3 */
+ ICR44 = 31; /* Output Compare 4 */
+ /* Output Compare 5 */
+ ICR45 = 31; /* Output Compare 6 */
+ /* Output Compare 7 */
+ ICR46 = 31; /* Sound Generator */
+ /* Phase Frequ. Modulator */
+ ICR47 = 31; /* System Reserved */
+ /* System Reserved */
+ ICR48 = 31; /* Prog. Pulse Gen. 0 */
+ /* Prog. Pulse Gen. 1 */
+ ICR49 = 31; /* Prog. Pulse Gen. 2 */
+ /* Prog. Pulse Gen. 3 */
+ ICR50 = 31; /* Prog. Pulse Gen. 4 */
+ /* Prog. Pulse Gen. 5 */
+ ICR51 = 31; /* Prog. Pulse Gen. 6 */
+ /* Prog. Pulse Gen. 7 */
+ ICR52 = 31; /* Prog. Pulse Gen. 8 */
+ /* Prog. Pulse Gen. 9 */
+ ICR53 = 31; /* Prog. Pulse Gen. 10 */
+ /* Prog. Pulse Gen. 11 */
+ ICR54 = 31; /* Prog. Pulse Gen. 12 */
+ /* Prog. Pulse Gen. 13 */
+ ICR55 = 31; /* Prog. Pulse Gen. 14 */
+ /* Prog. Pulse Gen. 15 */
+ ICR56 = 31; /* Up/Down Counter 0 */
+ /* Up/Down Counter 1 */
+ ICR57 = 31; /* Up/Down Counter 2 */
+ /* Up/Down Counter 3 */
+ ICR58 = 31; /* Real Time Clock */
+ /* Calibration Unit */
+ ICR59 = 31; /* A/D Converter 0 */
+ /* - */
+ ICR60 = 31; /* Alarm Comperator 0 */
+ /* Alarm Comperator 1 */
+ ICR61 = 31; /* Low Volage Detector */
+ /* SMC Zero Point 0-5 */
+ ICR62 = 31; /* Timebase Overflow */
+ /* PLL Clock Gear */
+ ICR63 = 31; /* DMA Controller */
+ /* Main/Sub OSC stability wait */
+}
+
+
+
+/*------------------------------------------------------------------------
+ Prototypes
+
+ Add your own prototypes here. Each vector definition needs is proto-
+ type. Either do it here or include a header file containing them.
+-------------------------------------------------------------------------*/
+__interrupt void DefaultIRQHandler (void);
+__interrupt void RLT_Channel0_ISR (void);
+
+
+/*------------------------------------------------------------------------
+ Vector definiton
+
+ Use following statements to define vectors. All resource related
+ vectors are predefined. Remaining software interrupts can be added here
+ as well.
+------------------------------------------------------------------------*/
+#pragma intvect 0xBFF8 0 /* (fixed) reset vector */
+#pragma intvect 0x06000000 1 /* (fixed) Mode Byte */
+
+#pragma intvect DefaultIRQHandler 15 /* Non Maskable Interrupt */
+#pragma intvect DefaultIRQHandler 16 /* External Interrupt 0 */
+#pragma intvect DefaultIRQHandler 17 /* External Interrupt 1 */
+#pragma intvect DefaultIRQHandler 18 /* External Interrupt 2 */
+#pragma intvect DefaultIRQHandler 19 /* External Interrupt 3 */
+#pragma intvect DefaultIRQHandler 20 /* External Interrupt 4 */
+#pragma intvect DefaultIRQHandler 21 /* External Interrupt 5 */
+#pragma intvect DefaultIRQHandler 22 /* External Interrupt 6 */
+#pragma intvect DefaultIRQHandler 23 /* External Interrupt 7 */
+#pragma intvect DefaultIRQHandler 24 /* External Interrupt 8 */
+#pragma intvect DefaultIRQHandler 25 /* External Interrupt 9 */
+#pragma intvect DefaultIRQHandler 26 /* External Interrupt 10 */
+#pragma intvect DefaultIRQHandler 27 /* External Interrupt 11 */
+#pragma intvect DefaultIRQHandler 28 /* External Interrupt 12 */
+#pragma intvect DefaultIRQHandler 29 /* External Interrupt 13 */
+#pragma intvect DefaultIRQHandler 30 /* External Interrupt 14 */
+#pragma intvect DefaultIRQHandler 31 /* External Interrupt 15 */
+#pragma intvect RLT_Channel0_ISR 32 /* Reload Timer 0 */
+#pragma intvect DefaultIRQHandler 33 /* Reload Timer 1 */
+#pragma intvect DefaultIRQHandler 34 /* Reload Timer 2 */
+#pragma intvect DefaultIRQHandler 35 /* Reload Timer 3 */
+#pragma intvect DefaultIRQHandler 36 /* Reload Timer 4 */
+#pragma intvect DefaultIRQHandler 37 /* Reload Timer 5 */
+#pragma intvect DefaultIRQHandler 38 /* Reload Timer 6 */
+#pragma intvect DefaultIRQHandler 39 /* Reload Timer 7 */
+#pragma intvect DefaultIRQHandler 40 /* Free Run Timer 0 */
+#pragma intvect DefaultIRQHandler 41 /* Free Run Timer 1 */
+#pragma intvect DefaultIRQHandler 42 /* Free Run Timer 2 */
+#pragma intvect DefaultIRQHandler 43 /* Free Run Timer 3 */
+#pragma intvect DefaultIRQHandler 44 /* Free Run Timer 4 */
+#pragma intvect DefaultIRQHandler 45 /* Free Run Timer 5 */
+#pragma intvect DefaultIRQHandler 46 /* Free Run Timer 6 */
+#pragma intvect DefaultIRQHandler 47 /* Free Run Timer 7 */
+#pragma intvect DefaultIRQHandler 48 /* CAN 0 */
+#pragma intvect DefaultIRQHandler 49 /* CAN 1 */
+#pragma intvect DefaultIRQHandler 50 /* CAN 2 */
+#pragma intvect DefaultIRQHandler 51 /* CAN 3 */
+#pragma intvect DefaultIRQHandler 52 /* CAN 4 */
+#pragma intvect DefaultIRQHandler 53 /* CAN 5 */
+#pragma intvect DefaultIRQHandler 54 /* USART (LIN) 0 RX */
+#pragma intvect DefaultIRQHandler 55 /* USART (LIN) 0 TX */
+#pragma intvect DefaultIRQHandler 56 /* USART (LIN) 1 RX */
+#pragma intvect DefaultIRQHandler 57 /* USART (LIN) 1 TX */
+#pragma intvect DefaultIRQHandler 58 /* USART (LIN) 2 RX */
+#pragma intvect DefaultIRQHandler 59 /* USART (LIN) 2 TX */
+#pragma intvect DefaultIRQHandler 60 /* USART (LIN) 3 RX */
+#pragma intvect DefaultIRQHandler 61 /* USART (LIN) 3 TX */
+#pragma intvect DefaultIRQHandler 62 /* System Reserved */
+#pragma intvect DefaultIRQHandler 63 /* Delayed Interrupt */
+#pragma intvect DefaultIRQHandler 64 /* System Reserved */
+#pragma intvect DefaultIRQHandler 65 /* System Reserved */
+#pragma intvect DefaultIRQHandler 66 /* USART (LIN, FIFO) 4 RX */
+#pragma intvect DefaultIRQHandler 67 /* USART (LIN, FIFO) 4 TX */
+#pragma intvect DefaultIRQHandler 68 /* USART (LIN, FIFO) 5 RX */
+#pragma intvect DefaultIRQHandler 69 /* USART (LIN, FIFO) 5 TX */
+#pragma intvect DefaultIRQHandler 70 /* USART (LIN, FIFO) 6 RX */
+#pragma intvect DefaultIRQHandler 71 /* USART (LIN, FIFO) 6 TX */
+#pragma intvect DefaultIRQHandler 72 /* USART (LIN, FIFO) 7 RX */
+#pragma intvect DefaultIRQHandler 73 /* USART (LIN, FIFO) 7 TX */
+#pragma intvect DefaultIRQHandler 74 /* I2C 0 / I2C 2 */
+#pragma intvect DefaultIRQHandler 75 /* I2C 1 / I2C 3 */
+#pragma intvect DefaultIRQHandler 76 /* USART (LIN, FIFO) 8 RX */
+#pragma intvect DefaultIRQHandler 77 /* USART (LIN, FIFO) 8 TX */
+#pragma intvect DefaultIRQHandler 78 /* USART (LIN, FIFO) 9 RX */
+#pragma intvect DefaultIRQHandler 79 /* USART (LIN, FIFO) 9 TX */
+#pragma intvect DefaultIRQHandler 80 /* USART (LIN, FIFO) 10 RX */
+#pragma intvect DefaultIRQHandler 81 /* USART (LIN, FIFO) 10 TX */
+#pragma intvect DefaultIRQHandler 82 /* USART (LIN, FIFO) 11 RX */
+#pragma intvect DefaultIRQHandler 83 /* USART (LIN, FIFO) 11 TX */
+#pragma intvect DefaultIRQHandler 84 /* USART (LIN, FIFO) 12 RX */
+#pragma intvect DefaultIRQHandler 85 /* USART (LIN, FIFO) 12 TX */
+#pragma intvect DefaultIRQHandler 86 /* USART (LIN, FIFO) 13 RX */
+#pragma intvect DefaultIRQHandler 87 /* USART (LIN, FIFO) 13 TX */
+#pragma intvect DefaultIRQHandler 88 /* USART (LIN, FIFO) 14 RX */
+#pragma intvect DefaultIRQHandler 89 /* USART (LIN, FIFO) 14 TX */
+#pragma intvect DefaultIRQHandler 90 /* USART (LIN, FIFO) 15 RX */
+#pragma intvect DefaultIRQHandler 91 /* USART (LIN, FIFO) 15 TX */
+#pragma intvect DefaultIRQHandler 92 /* Input Capture 0 */
+#pragma intvect DefaultIRQHandler 93 /* Input Capture 1 */
+#pragma intvect DefaultIRQHandler 94 /* Input Capture 2 */
+#pragma intvect DefaultIRQHandler 95 /* Input Capture 3 */
+#pragma intvect DefaultIRQHandler 96 /* Input Capture 4 */
+#pragma intvect DefaultIRQHandler 97 /* Input Capture 5 */
+#pragma intvect DefaultIRQHandler 98 /* Input Capture 6 */
+#pragma intvect DefaultIRQHandler 99 /* Input Capture 7 */
+#pragma intvect DefaultIRQHandler 100 /* Output Compare 0 */
+#pragma intvect DefaultIRQHandler 101 /* Output Compare 1 */
+#pragma intvect DefaultIRQHandler 102 /* Output Compare 2 */
+#pragma intvect DefaultIRQHandler 103 /* Output Compare 3 */
+#pragma intvect DefaultIRQHandler 104 /* Output Compare 4 */
+#pragma intvect DefaultIRQHandler 105 /* Output Compare 5 */
+#pragma intvect DefaultIRQHandler 106 /* Output Compare 6 */
+#pragma intvect DefaultIRQHandler 107 /* Output Compare 7 */
+#pragma intvect DefaultIRQHandler 108 /* Sound Generator */
+#pragma intvect DefaultIRQHandler 109 /* Phase Frequ. Modulator */
+#pragma intvect DefaultIRQHandler 110 /* System Reserved */
+#pragma intvect DefaultIRQHandler 111 /* System Reserved */
+#pragma intvect DefaultIRQHandler 112 /* Prog. Pulse Gen. 0 */
+#pragma intvect DefaultIRQHandler 113 /* Prog. Pulse Gen. 1 */
+#pragma intvect DefaultIRQHandler 114 /* Prog. Pulse Gen. 2 */
+#pragma intvect DefaultIRQHandler 115 /* Prog. Pulse Gen. 3 */
+#pragma intvect DefaultIRQHandler 116 /* Prog. Pulse Gen. 4 */
+#pragma intvect DefaultIRQHandler 117 /* Prog. Pulse Gen. 5 */
+#pragma intvect DefaultIRQHandler 118 /* Prog. Pulse Gen. 6 */
+#pragma intvect DefaultIRQHandler 119 /* Prog. Pulse Gen. 7 */
+#pragma intvect DefaultIRQHandler 120 /* Prog. Pulse Gen. 8 */
+#pragma intvect DefaultIRQHandler 121 /* Prog. Pulse Gen. 9 */
+#pragma intvect DefaultIRQHandler 122 /* Prog. Pulse Gen. 10 */
+#pragma intvect DefaultIRQHandler 123 /* Prog. Pulse Gen. 11 */
+#pragma intvect DefaultIRQHandler 124 /* Prog. Pulse Gen. 12 */
+#pragma intvect DefaultIRQHandler 125 /* Prog. Pulse Gen. 13 */
+#pragma intvect DefaultIRQHandler 126 /* Prog. Pulse Gen. 14 */
+#pragma intvect DefaultIRQHandler 127 /* Prog. Pulse Gen. 15 */
+#pragma intvect DefaultIRQHandler 128 /* Up/Down Counter 0 */
+#pragma intvect DefaultIRQHandler 129 /* Up/Down Counter 1 */
+#pragma intvect DefaultIRQHandler 130 /* Up/Down Counter 2 */
+#pragma intvect DefaultIRQHandler 131 /* Up/Down Counter 3 */
+#pragma intvect DefaultIRQHandler 132 /* Real Time Clock */
+#pragma intvect DefaultIRQHandler 133 /* Calibration Unit */
+#pragma intvect DefaultIRQHandler 134 /* A/D Converter 0 */
+#pragma intvect DefaultIRQHandler 135 /* - */
+#pragma intvect DefaultIRQHandler 136 /* Alarm Comperator 0 */
+#pragma intvect DefaultIRQHandler 137 /* Alarm Comperator 1 */
+#pragma intvect DefaultIRQHandler 138 /* Low Volage Detector */
+#pragma intvect DefaultIRQHandler 139 /* SMC Zero Point 0-5 */
+#pragma intvect DefaultIRQHandler 140 /* Timebase Overflow */
+#pragma intvect DefaultIRQHandler 141 /* PLL Clock Gear */
+#pragma intvect DefaultIRQHandler 142 /* DMA Controller */
+#pragma intvect DefaultIRQHandler 143 /* Main/Sub OSC stability wait */
+#pragma intvect 0xFFFFFFFF 144 /* Boot Sec. Vector (MB91V460A) */
+
+
+
+/*------------------------------------------------------------------------
+ DefaultIRQHandler()
+
+ This function is a placeholder for all vector definitions. Either use
+ your own placeholder or add necessary code here.
+-------------------------------------------------------------------------*/
+__interrupt
+void DefaultIRQHandler (void)
+{
+ /* RB_SYNC; */ /* Synchronisation with R-Bus */
+ /* May be required, if there is */
+ /* no R-Bus access after the */
+ /* reset of the interrupt flag */
+
+ __DI(); /* disable interrupts */
+ while(1)
+ HWWD_CL = 0; /* feed hardware watchdog */
+ /* halt system */
+}
projects / pyfrprog.git / blobdiff