From f16286c7c72e5f9a8c5f2db8162a9f2f0a9d9f85 Mon Sep 17 00:00:00 2001 From: Bernhard Urban Date: Sat, 5 Sep 2009 01:09:28 +0200 Subject: [PATCH] sync before write hcca_SRC? else just peanuts --- irq.c | 2 +- ohci.c | 29 ++++++++++----------- ohci.h | 82 ++++++++-------------------------------------------------- 3 files changed, 25 insertions(+), 88 deletions(-) diff --git a/irq.c b/irq.c index fad2484..c37240c 100644 --- a/irq.c +++ b/irq.c @@ -115,8 +115,8 @@ void irq_handler(void) write32(HW_PPCIRQFLAG, IRQF_OHCI0); } if (hw_flags & IRQF_OHCI1) { - write32(HW_PPCIRQFLAG, IRQF_OHCI1); //TODO: ohci1_irq(); + write32(HW_PPCIRQFLAG, IRQF_OHCI1); } hw_flags &= ~IRQF_ALL; diff --git a/ohci.c b/ohci.c index 26aae24..89ab5d7 100644 --- a/ohci.c +++ b/ohci.c @@ -1,5 +1,5 @@ /* - mini - a Free Software replacement for the Nintendo/BroadOn IOS. + ppcskel - a Free Software replacement for the Nintendo/BroadOn bootloader. ohci hardware support Copyright (C) 2009 Bernhard Urban @@ -10,35 +10,32 @@ Copyright (C) 2009 Sebastian Falbesoner */ #include "bootmii_ppc.h" +#include "hollywood.h" #include "ohci.h" #include "irq.h" #include "string.h" -#define gecko_printf printf -#define dma_addr(address) virt_to_phys(address) - - static struct ohci_hcca hcca_oh0; static void dbg_op_state() { switch (read32(OHCI0_HC_CONTROL) & OHCI_CTRL_HCFS) { case OHCI_USB_SUSPEND: - gecko_printf("ohci-- OHCI_USB_SUSPEND\n"); + printf("ohci-- OHCI_USB_SUSPEND\n"); break; case OHCI_USB_RESET: - gecko_printf("ohci-- OHCI_USB_RESET\n"); + printf("ohci-- OHCI_USB_RESET\n"); break; case OHCI_USB_OPER: - gecko_printf("ohci-- OHCI_USB_OPER\n"); + printf("ohci-- OHCI_USB_OPER\n"); break; case OHCI_USB_RESUME: - gecko_printf("ohci-- OHCI_USB_RESUME\n"); + printf("ohci-- OHCI_USB_RESUME\n"); break; } } void ohci_init() { - gecko_printf("ohci-- init\n"); + printf("ohci-- init\n"); dbg_op_state(); /* disable hc interrupts */ @@ -49,7 +46,7 @@ void ohci_init() { #define FI 0x2edf /* 12000 bits per frame (-1) */ u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff; if(fmint != FI) - gecko_printf("ohci-- fminterval delta: %d\n", fmint - FI); + printf("ohci-- fminterval delta: %d\n", fmint - FI); fmint |= FSMP (fmint) << 16; /* enable interrupts of both usb host controllers */ @@ -62,7 +59,7 @@ void ohci_init() { u32 ts = 30; while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) { if(--ts == 0) { - gecko_printf("ohci-- FAILED"); + printf("ohci-- FAILED"); return; } udelay(1); @@ -80,7 +77,8 @@ void ohci_init() { write32(OHCI0_HC_BULK_HEAD_ED, 0); /* set hcca adress */ - write32(OHCI0_HC_HCCA, dma_addr(&hcca_oh0)); + sync_after_write(&hcca_oh0, 256); + write32(OHCI0_HC_HCCA, virt_to_phys(&hcca_oh0)); /* set periodicstart */ #define FIT (1<<31) @@ -92,7 +90,7 @@ void ohci_init() { /* testing bla */ if ((read32(OHCI0_HC_FM_INTERVAL) & 0x3fff0000) == 0 || !read32(OHCI0_HC_PERIODIC_START)) { - gecko_printf("ohci-- w00t, fail!! see ohci-hcd.c:669\n"); + printf("ohci-- w00t, fail!! see ohci-hcd.c:669\n"); } /* start HC operations */ @@ -111,8 +109,7 @@ void ohci_init() { } void ohci0_irq() { - gecko_printf("ohci_irq\n"); write32(OHCI0_HC_INT_STATUS, ~0); + printf("ohci_irq\n"); } - diff --git a/ohci.h b/ohci.h index e9a41b0..e528d58 100644 --- a/ohci.h +++ b/ohci.h @@ -1,78 +1,18 @@ -#ifndef __OHCI_H__ -#define __OHCI_H__ - -#include "types.h" - -/* OHCI0 Registers */ - -#define OHCI0_REG_BASE 0xd050000 - -#define OHCI0_HC_REVISION (OHCI0_REG_BASE + 0x00) -#define OHCI0_HC_CONTROL (OHCI0_REG_BASE + 0x04) -#define OHCI0_HC_COMMAND_STATUS (OHCI0_REG_BASE + 0x08) -#define OHCI0_HC_INT_STATUS (OHCI0_REG_BASE + 0x0C) - -#define OHCI0_HC_INT_ENABLE (OHCI0_REG_BASE + 0x10) -#define OHCI0_HC_INT_DISABLE (OHCI0_REG_BASE + 0x14) -#define OHCI0_HC_HCCA (OHCI0_REG_BASE + 0x18) -#define OHCI0_HC_PERIOD_CURRENT_ED (OHCI0_REG_BASE + 0x1C) - -#define OHCI0_HC_CTRL_HEAD_ED (OHCI0_REG_BASE + 0x20) -#define OHCI0_HC_CTRL_CURRENT_ED (OHCI0_REG_BASE + 0x24) -#define OHCI0_HC_BULK_HEAD_ED (OHCI0_REG_BASE + 0x28) -#define OHCI0_HC_BULK_CURRENT_ED (OHCI0_REG_BASE + 0x2C) - -#define OHCI0_HC_DONE_HEAD (OHCI0_REG_BASE + 0x30) -#define OHCI0_HC_FM_INTERVAL (OHCI0_REG_BASE + 0x34) -#define OHCI0_HC_FM_REMAINING (OHCI0_REG_BASE + 0x38) -#define OHCI0_HC_FM_NUMBER (OHCI0_REG_BASE + 0x3C) - -#define OHCI0_HC_PERIODIC_START (OHCI0_REG_BASE + 0x40) -#define OHCI0_HC_LS_THRESHOLD (OHCI0_REG_BASE + 0x44) -#define OHCI0_HC_RH_DESCRIPTOR_A (OHCI0_REG_BASE + 0x48) -#define OHCI0_HC_RH_DESCRIPTOR_B (OHCI0_REG_BASE + 0x4C) - -#define OHCI0_HC_RH_STATUS (OHCI0_REG_BASE + 0x50) - - -/* OHCI1 Registers */ - -#define OHCI1_REG_BASE 0xd060000 - -#define OHCI1_HC_REVISION (OHCI1_REG_BASE + 0x00) -#define OHCI1_HC_CONTROL (OHCI1_REG_BASE + 0x04) -#define OHCI1_HC_COMMAND_STATUS (OHCI1_REG_BASE + 0x08) -#define OHCI1_HC_INT_STATUS (OHCI1_REG_BASE + 0x0C) - -#define OHCI1_HC_INT_ENABLE (OHCI1_REG_BASE + 0x10) -#define OHCI1_HC_INT_DISABLE (OHCI1_REG_BASE + 0x14) -#define OHCI1_HC_HCCA (OHCI1_REG_BASE + 0x18) -#define OHCI1_HC_PERIOD_CURRENT_ED (OHCI1_REG_BASE + 0x1C) - -#define OHCI1_HC_CTRL_HEAD_ED (OHCI1_REG_BASE + 0x20) -#define OHCI1_HC_CTRL_CURRENT_ED (OHCI1_REG_BASE + 0x24) -#define OHCI1_HC_BULK_HEAD_ED (OHCI1_REG_BASE + 0x28) -#define OHCI1_HC_BULK_CURRENT_ED (OHCI1_REG_BASE + 0x2C) - -#define OHCI1_HC_DONE_HEAD (OHCI1_REG_BASE + 0x30) -#define OHCI1_HC_FM_INTERVAL (OHCI1_REG_BASE + 0x34) -#define OHCI1_HC_FM_REMAINING (OHCI1_REG_BASE + 0x38) -#define OHCI1_HC_FM_NUMBER (OHCI1_REG_BASE + 0x3C) +/* + ppcskel - a Free Software replacement for the Nintendo/BroadOn bootloader. + ohci hardware support -#define OHCI1_HC_PERIODIC_START (OHCI1_REG_BASE + 0x40) -#define OHCI1_HC_LS_THRESHOLD (OHCI1_REG_BASE + 0x44) -#define OHCI1_HC_RH_DESCRIPTOR_A (OHCI1_REG_BASE + 0x48) -#define OHCI1_HC_RH_DESCRIPTOR_B (OHCI1_REG_BASE + 0x4C) +Copyright (C) 2009 Bernhard Urban +Copyright (C) 2009 Sebastian Falbesoner -#define OHCI1_HC_RH_STATUS (OHCI1_REG_BASE + 0x50) +# This code is licensed to you under the terms of the GNU GPL, version 2; +# see file COPYING or http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt +*/ -/* EHCI Registers */ -#define EHCI_REG_BASE 0xd040000 +#ifndef __OHCI_H__ +#define __OHCI_H__ -/* stolen from mikep2 patched linux kernel: drivers/usb/host/ohci-mipc.c */ -#define EHCI_CTL (EHCI_REG_BASE + 0xCC) -#define EHCI_CTL_OH0INTE (1<<11) /* oh0 interrupt enable */ -#define EHCI_CTL_OH1INTE (1<<12) /* oh1 interrupt enable */ +#include "types.h" /* stolen from drivers/usb/host/ohci.h (linux-kernel) :) */ -- 2.25.1