From 3169c95c4ddd84c74a397760d617e840530c13e0 Mon Sep 17 00:00:00 2001 From: theStack Date: Mon, 31 Aug 2009 21:52:28 +0200 Subject: [PATCH] implemented simple irq handler, added irq.h --- exception.c | 24 ++++++++++++++++++++++++ irq.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++ main.c | 24 ++++++++++-------------- ohci.c | 29 +---------------------------- 4 files changed, 85 insertions(+), 42 deletions(-) create mode 100644 irq.h diff --git a/exception.c b/exception.c index 095de44..44055f1 100644 --- a/exception.c +++ b/exception.c @@ -11,11 +11,35 @@ Copyright (C) 2008 Segher Boessenkool #include "bootmii_ppc.h" #include "string.h" +#include "irq.h" extern char exception_2200_start, exception_2200_end; void exception_handler(int exception) { + // check if the exception was actually an interrupt + if (exception == 0x500) { + u32 cookie; + + _CPU_ISR_Disable(cookie); + printf("\nInterrupt occured ;-) Which one? -> "); + u32 enabled = read32(BW_PI_IRQMASK); + u32 flags = read32(BW_PI_IRQFLAG); + flags = flags & enabled; + if (flags & (1<<1)) { // RESET + write32(BW_PI_IRQFLAG, 1<<1); + printf("RESET :)\n"); + } + if (flags & (1<<14)) { // Hollywood-PIC IRQ + write32(BW_PI_IRQFLAG, 1<<14); + write32(HW_PPCIRQFLAG, ~0); // dirty + printf("Hollywood-PIC :)\n"); + } + _CPU_ISR_Restore(cookie); + + return; + } + u32 *x; u32 i; diff --git a/irq.h b/irq.h new file mode 100644 index 0000000..360489c --- /dev/null +++ b/irq.h @@ -0,0 +1,50 @@ +#ifndef __IRQ_H__ +#define __IRQ_H__ + +/* hollywood-pic registers */ +#define HW_PPCIRQFLAG (0x0d800030) +#define HW_PPCIRQMASK (0x0d800034) + +/* broadway processor interface registers */ +#define BW_PI_IRQFLAG (0x0c003000) +#define BW_PI_IRQMASK (0x0c003004) + +/* stolen from libogc - gc/ogc/machine/processor.h */ +#define _CPU_ISR_Enable() \ + { register u32 _val = 0; \ + __asm__ __volatile__ ( \ + "mfmsr %0\n" \ + "ori %0,%0,0x8000\n" \ + "mtmsr %0" \ + : "=&r" ((_val)) : "0" ((_val)) \ + ); \ + } + +#define _CPU_ISR_Disable( _isr_cookie ) \ + { register u32 _disable_mask = 0; \ + _isr_cookie = 0; \ + __asm__ __volatile__ ( \ + "mfmsr %0\n" \ + "rlwinm %1,%0,0,17,15\n" \ + "mtmsr %1\n" \ + "extrwi %0,%0,1,16" \ + : "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) \ + : "0" ((_isr_cookie)), "1" ((_disable_mask)) \ + ); \ + } + +#define _CPU_ISR_Restore( _isr_cookie ) \ + { register u32 _enable_mask = 0; \ + __asm__ __volatile__ ( \ + " cmpwi %0,0\n" \ + " beq 1f\n" \ + " mfmsr %1\n" \ + " ori %1,%1,0x8000\n" \ + " mtmsr %1\n" \ + "1:" \ + : "=r"((_isr_cookie)),"=&r" ((_enable_mask)) \ + : "0"((_isr_cookie)),"1" ((_enable_mask)) \ + ); \ + } + +#endif diff --git a/main.c b/main.c index c75712b..ca0b2ea 100644 --- a/main.c +++ b/main.c @@ -25,6 +25,7 @@ Copyright (C) 2009 John Kelley #include "input.h" #include "console.h" #include "ohci.h" +#include "irq.h" #define MINIMUM_MINI_VERSION 0x00010001 @@ -84,7 +85,7 @@ int main(void) dsp_reset(); // clear interrupt mask - write32(0x0c003004, 0); + write32(BW_PI_IRQMASK, 0); ipc_initialize(); ipc_slowping(); @@ -118,24 +119,19 @@ int main(void) printf("bye, world!\n"); // enable OHCI0 interrupt on hollywood-pic -#define HW_PPCIRQFLAG (0x0d800030) -#define HW_PPCIRQMASK (0x0d800034) write32(HW_PPCIRQFLAG, ~0); write32(HW_PPCIRQMASK, 1<<5); // enable RESET and PIC (#14) interrupts on processor interface - write32(0x0c003004, (1<<1) | (1<<14)); -#define _CPU_ISR_Enable() \ - { register u32 _val = 0; \ - __asm__ __volatile__ ( \ - "mfmsr %0\n" \ - "ori %0,%0,0x8000\n" \ - "mtmsr %0" \ - : "=&r" ((_val)) : "0" ((_val)) \ - ); \ - } + write32(BW_PI_IRQFLAG, ~0); + write32(BW_PI_IRQMASK, (1<<1) | (1<<14)); _CPU_ISR_Enable() - while(1) {} + while(1) { + // just to get sure we are still in this loop + _CPU_ISR_Enable() // don't know why this is needed... + udelay(100000); + printf("x"); + } return 0; } diff --git a/ohci.c b/ohci.c index 4c09c59..55b887e 100644 --- a/ohci.c +++ b/ohci.c @@ -11,39 +11,12 @@ Copyright (C) 2009 Sebastian Falbesoner #include "bootmii_ppc.h" #include "ohci.h" +#include "irq.h" #define gecko_printf printf #define set32(address, flags) write32(address, read32(address) | flags) #define dma_addr(address) (u32)address -/* stolen from libogc - gc/ogc/machine/processor.h */ -#define _CPU_ISR_Disable( _isr_cookie ) \ - { register u32 _disable_mask = 0; \ - _isr_cookie = 0; \ - __asm__ __volatile__ ( \ - "mfmsr %0\n" \ - "rlwinm %1,%0,0,17,15\n" \ - "mtmsr %1\n" \ - "extrwi %0,%0,1,16" \ - : "=&r" ((_isr_cookie)), "=&r" ((_disable_mask)) \ - : "0" ((_isr_cookie)), "1" ((_disable_mask)) \ - ); \ - } - -#define _CPU_ISR_Restore( _isr_cookie ) \ - { register u32 _enable_mask = 0; \ - __asm__ __volatile__ ( \ - " cmpwi %0,0\n" \ - " beq 1f\n" \ - " mfmsr %1\n" \ - " ori %1,%1,0x8000\n" \ - " mtmsr %1\n" \ - "1:" \ - : "=r"((_isr_cookie)),"=&r" ((_enable_mask)) \ - : "0"((_isr_cookie)),"1" ((_enable_mask)) \ - ); \ - } - static struct ohci_hcca hcca_oh0; -- 2.25.1