From 2bfb047099778daa92d5905de1c7527acf8ed97c Mon Sep 17 00:00:00 2001
From: Bernhard Urban <lewurm@gmx.net>
Date: Sat, 19 Sep 2009 01:14:27 +0200
Subject: [PATCH] it works now, but we don't know why... *sigh* :(

---
 usb/core/core.h |  3 +--
 usb/host/ohci.c | 19 ++++++++++++-------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/usb/core/core.h b/usb/core/core.h
index 50d8d2a..d48dea7 100644
--- a/usb/core/core.h
+++ b/usb/core/core.h
@@ -42,8 +42,7 @@
 #include "../../bootmii_ppc.h"
 inline static void wait_ms(int ms)
 {
-	int i=0;
-	for(;i<ms;i++)
+	while(ms--)
 		udelay(1000);
 }
 
diff --git a/usb/host/ohci.c b/usb/host/ohci.c
index 5a0d8a7..feddfa3 100644
--- a/usb/host/ohci.c
+++ b/usb/host/ohci.c
@@ -359,12 +359,15 @@ void hcdi_init()
 	write32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
 
 	/* wake on ConnectStatusChange, matching external hubs */
-	set32(OHCI0_HC_RH_STATUS, RH_HS_DRWE);
+	write32(OHCI0_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
 
 	/* Choose the interrupts we care about now, others later on demand */
 	write32(OHCI0_HC_INT_STATUS, ~0);
 	write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
 
+	//wtf?
+	wait_ms ((read32(OHCI0_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
+
 	configure_ports((u8)1);
 	irq_restore(cookie);
 
@@ -388,21 +391,23 @@ static void setup_port(u32 reg, u8 from_init)
 {
 	u32 port = read32(reg);
 	if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
+		write32(reg, RH_PS_CCS);
 		write32(reg, RH_PS_CSC);
 
-		wait_ms(100);
+		wait_ms(200);
 
 		/* clear CSC flag, set PES and start port reset (PRS) */
 		write32(reg, RH_PS_PES);
+		wait_ms(200);
+		while(!(read32(reg) & RH_PS_PES)) {
+			printf("fu\n");
+		}
 		port = read32(reg);
+		wait_ms(200);
 		write32(reg, RH_PS_PRS);
 
 		/* spin until port reset is complete */
-		port = read32(reg);
-		while(!(port & RH_PS_PRSC)) {
-			udelay(1);
-			port = read32(reg);
-		}
+		while((read32(reg) & RH_PS_PRS));
 		printf("loop done\n");
 
 		(void) usb_add_device();
-- 
2.25.1