(((dword) & 0x0000FF00) << 8) | \
(((dword) & 0x000000FF) << 24) )
+static struct endpoint_descriptor *allocate_endpoint();
+static struct general_td *allocate_general_td(size_t);
+static void control_quirk();
+static void dbg_op_state();
+static void dbg_td_flag(u32 flag);
+static void configure_ports(u8 from_init);
+static void setup_port(u32 reg, u8 from_init);
+
static struct ohci_hcca hcca_oh0;
+
static struct endpoint_descriptor *allocate_endpoint()
{
struct endpoint_descriptor *ep;
- ep = (struct endpoint_descriptor *)calloc(sizeof(struct endpoint_descriptor), 16);
+ //memalign instead of calloc doesn't work here?! WTF
+ ep = (struct endpoint_descriptor *)memalign(sizeof(struct endpoint_descriptor), 16);
ep->flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
ep->headp = ep->tailp = ep->nexted = ACCESS_LE(0);
return ep;
static struct general_td *allocate_general_td(size_t bsize)
{
struct general_td *td;
- td = (struct general_td *)calloc(sizeof(struct general_td), 16);
+ td = (struct general_td *)memalign(sizeof(struct general_td), 16);
td->flags = ACCESS_LE(0);
+ // TODO !! nexttd?
td->nexttd = ACCESS_LE(virt_to_phys(td));
+ //td->nexttd = ACCESS_LE(0);
if(bsize == 0) {
td->cbp = td->be = ACCESS_LE(0);
} else {
+ //td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1);
}
static void control_quirk()
{
- static struct endpoint_descriptor *ed; /* empty ED */
- static struct general_td *td; /* dummy TD */
+ static struct endpoint_descriptor *ed = 0; /* empty ED */
+ static struct general_td *td = 0; /* dummy TD */
u32 head;
u32 current;
u32 status;
* Load the special empty ED and tell the controller to
* process the control list.
*/
- sync_after_write(ed, 64);
- sync_after_write(td, 64);
+ sync_after_write(ed, 16);
+ sync_after_write(td, 16);
write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(ed));
status = read32(OHCI0_HC_CONTROL);
}
}
+static void dbg_td_flag(u32 flag)
+{
+ printf("**************** dbg_td_flag: 0x%08X ***************\n", flag);
+ printf("CC: %X\tshould be 0, see page 32 (ohci spec)\n", (flag>>28)&0xf);
+ printf("EC: %X\tsee page 20 (ohci spec)\n", (flag>>26)&3);
+ printf(" T: %X\n", (flag>>24)&3);
+ printf("DI: %X\n", (flag>>21)&7);
+ printf("DP: %X\n", (flag>>19)&3);
+ printf(" R: %X\n", (flag>>18)&1);
+ printf("********************************************************\n");
+}
+
+
/**
* Enqueue a transfer descriptor.
*/
-u8 first = 0;
u8 hcdi_enqueue(usb_transfer_descriptor *td) {
- control_quirk();
+ control_quirk(); //required? YES! :O
+
+ static struct endpoint_descriptor dummyconfig;
+ dummyconfig.flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
+ dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
printf( "===========================\n"
- "===========================\n"
- "done head (vor sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ "===========================\n");
sync_before_read(&hcca_oh0, 256);
printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
- printf("HCCA->frame_no after %d seconds: %d\n", 0, ACCESS_LE(hcca_oh0.frame_no));
- printf("HCCA->frame_no WITHOUT conversion macro: %d\n", hcca_oh0.frame_no);
- if(!first) {
- first = 1;
- udelay(1000000);
- sync_before_read(&hcca_oh0, 256);
- printf("HCCA->frame_no after %d seconds: %d\n", 1, ACCESS_LE(hcca_oh0.frame_no));
- printf("HCCA->frame_no WITHOUT conversion macro: %d\n", hcca_oh0.frame_no);
- }
+ printf("HCCA->frame_no: %d\nhcca->hccapad1: %d\n",
+ ((ACCESS_LE(hcca_oh0.frame_no) & 0xffff)>>16),
+ ACCESS_LE(hcca_oh0.frame_no)&0x0000ffff );
struct general_td *tmptd = allocate_general_td(td->actlen);
- (void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen); /* throws dsi exception after some time :X */
+ (void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen);
tmptd->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK);
switch(td->pid) {
}
tmptd->flags |= ACCESS_LE((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0);
- printf("tmptd hexump (before):\n");
+ printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
hexdump(tmptd, sizeof(struct general_td));
- printf("tmptd-cbp hexump (before):\n");
- hexdump((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->actlen);
+ printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
+ hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- sync_after_write((void*) ACCESS_LE(tmptd->cbp), td->actlen);
sync_after_write(tmptd, sizeof(struct general_td));
+ sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- struct endpoint_descriptor *dummyconfig = allocate_endpoint();
-
- u32 current2 = read32(OHCI0_HC_CTRL_CURRENT_ED);
- printf("current2: 0x%08X\n", current2);
#define ED_MASK2 ~0 /*((u32)~0x0f) */
#define ED_MASK ((u32)~0x0f)
- printf("tmpdt & ED_MASK: 0x%08X\n", virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
- dummyconfig->tailp = dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+ dummyconfig.headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
- dummyconfig->flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
+ dummyconfig.flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
- sync_after_write(dummyconfig, 64);
- write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(dummyconfig));
+ printf("dummyconfig hexdump (before) 0x%08X:\n", &dummyconfig);
+ hexdump((void*) &dummyconfig, 16);
- printf("OHCI_CTRL_CLE: 0x%08X\n", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
+ sync_after_write(&dummyconfig, 16);
+ write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(&dummyconfig));
+
+ printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
printf("current: 0x%08X\n", current);
while(!current) {
- udelay(10);
+ udelay(2);
current = read32(OHCI0_HC_CTRL_CURRENT_ED);
}
- udelay(2000);
- udelay(2000);
- udelay(2000);
+ udelay(20000);
current = read32(OHCI0_HC_CTRL_CURRENT_ED);
printf("current: 0x%08X\n", current);
printf("+++++++++++++++++++++++++++++\n");
- udelay(2000);
- udelay(2000);
- udelay(2000);
- udelay(2000);
- udelay(2000);
- udelay(2000);
- udelay(2000);
- udelay(2000);
+ udelay(20000);
sync_before_read(tmptd, sizeof(struct general_td));
- printf("tmptd hexump (after):\n");
+ printf("tmptd hexdump (after) 0x%08X:\n", tmptd);
hexdump(tmptd, sizeof(struct general_td));
+ dbg_td_flag(ACCESS_LE(tmptd->flags));
+
+ sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+ printf("tmptd->cbp hexdump (after) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
+ hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- sync_before_read((void*) ACCESS_LE(tmptd->cbp), td->actlen);
- printf("tmptd-cbp hexump (after):\n");
- hexdump((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->actlen);
+ sync_before_read(&dummyconfig, 16);
+ printf("dummyconfig hexdump (after) 0x%08X:\n", &dummyconfig);
+ hexdump((void*) &dummyconfig, 16);
- printf("done head (vor sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
sync_before_read(&hcca_oh0, 256);
printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+ (void) memcpy((void*) (td->buffer), phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+
+ write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
+ dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
+ //should be free'd after taking it from the done queue
+ //however, it fails?! WTF
+#if 0
+ printf("WTF1\n");
free(tmptd);
+ printf("WTF0\n");
+ free((void*) tmptd->cbp);
+ printf("WTF3\n");
+#endif
return 0;
}
write32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
/* wake on ConnectStatusChange, matching external hubs */
- set32(OHCI0_HC_RH_STATUS, RH_HS_DRWE);
+ write32(OHCI0_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
/* Choose the interrupts we care about now, others later on demand */
write32(OHCI0_HC_INT_STATUS, ~0);
write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
+ //wtf?
+ wait_ms ((read32(OHCI0_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
+
+ configure_ports((u8)1);
irq_restore(cookie);
dbg_op_state();
}
+static void configure_ports(u8 from_init)
+{
+ printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
+ printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
+ printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
+ printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
+ printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+
+ setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
+ setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+ printf("configure_ports done\n");
+}
+
+static void setup_port(u32 reg, u8 from_init)
+{
+ u32 port = read32(reg);
+ if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
+ write32(reg, RH_PS_CSC);
+
+ wait_ms(150);
+
+ /* clear CSC flag, set PES and start port reset (PRS) */
+ write32(reg, RH_PS_PES);
+ while(!(read32(reg) & RH_PS_PES)) {
+ printf("fu\n");
+ return;
+ }
+
+ write32(reg, RH_PS_PRS);
+
+ /* spin until port reset is complete */
+ while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
+ printf("loop done\n");
+
+ (void) usb_add_device();
+ }
+}
+
void hcdi_irq()
{
/* read interrupt status */
flags &= read32(OHCI0_HC_INT_ENABLE);
/* nothing to do? */
- if (flags == 0)
+ if (flags == 0) {
+ printf("OHCI Interrupt occured: but not for you! WTF?!\n");
return;
+ }
printf("OHCI Interrupt occured: ");
/* UnrecoverableError */
if (flags & OHCI_INTR_RHSC) {
printf("RootHubStatusChange\n");
/* TODO: set some next_statechange variable... */
+ configure_ports(0);
write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
}
/* ResumeDetected */
/* WritebackDoneHead */
if (flags & OHCI_INTR_WDH) {
printf("WritebackDoneHead\n");
- /* TODO: figure out what the linux kernel does here... */
+ /* basically the linux irq handler reverse TDs to their urbs
+ * and set done_head to null.
+ * since we are polling atm, just should do the latter task.
+ * however, this won't work for now (i don't know why...)
+ * TODO!
+ */
+#if 0
+ sync_before_read(&hcca_oh0, 256);
+ hcca_oh0.done_head = 0;
+ sync_after_write(&hcca_oh0, 256);
+#endif
}
/* TODO: handle any pending URB/ED unlinks... */
projects / ppcskel.git / blobdiff