(((dword) & 0x0000FF00) << 8) | \
(((dword) & 0x000000FF) << 24) )
+static struct endpoint_descriptor *allocate_endpoint();
+static struct general_td *allocate_general_td(size_t);
+static void control_quirk();
+static void dbg_op_state();
+static void dbg_td_flag(u32 flag);
+static void configure_ports(u8 from_init);
+static void setup_port(u32 reg, u8 from_init);
+
static struct ohci_hcca hcca_oh0;
+
static struct endpoint_descriptor *allocate_endpoint()
{
struct endpoint_descriptor *ep;
if(bsize == 0) {
td->cbp = td->be = ACCESS_LE(0);
} else {
- //td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
- td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
+ td->cbp = ACCESS_LE(virt_to_phys(memalign(bsize, 16))); //memailgn required here?
+ //td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1);
}
return td;
*/
u8 hcdi_enqueue(usb_transfer_descriptor *td) {
control_quirk(); //required? YES! :O
+ u32 tmptdbuffer;
static struct endpoint_descriptor dummyconfig;
dummyconfig.flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
hexdump(tmptd, sizeof(struct general_td));
+ //save buffer adress here; HC may change tmptd->cbp
+ tmptdbuffer = phys_to_virt(ACCESS_LE(tmptd->cbp));
printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
sync_after_write(tmptd, sizeof(struct general_td));
sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
-
-#define ED_MASK2 ~0 /*((u32)~0x0f) */
#define ED_MASK ((u32)~0x0f)
dummyconfig.headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
/* spin until the controller is done with the control list */
u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
printf("current: 0x%08X\n", current);
+
+ //don't use this quirk stuff here!
+#if 0
while(!current) {
udelay(2);
current = read32(OHCI0_HC_CTRL_CURRENT_ED);
}
+#endif
udelay(20000);
current = read32(OHCI0_HC_CTRL_CURRENT_ED);
sync_before_read(&hcca_oh0, 256);
printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
+ struct general_td* donetd = phys_to_virt(ACCESS_LE(hcca_oh0.done_head)&~1);
+ sync_before_read(donetd, 16);
+ printf("done head hexdump: 0x%08X\n", donetd);
+ hexdump((void*) donetd, 16);
+
sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
(void) memcpy((void*) (td->buffer), phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
- //should be free'd after taking it from the done queue
- //however, it fails?! WTF
-#if 0
- printf("WTF1\n");
+
+
+ /*
+ * TD should be free'd after taking it from the done queue.
+ * but we are very very dirty and do it anyway :p
+ */
+
+ /* only when a buffer is allocated */
+ if(td->actlen)
+ free((void*)tmptdbuffer);
free(tmptd);
- printf("WTF0\n");
- free((void*) tmptd->cbp);
- printf("WTF3\n");
-#endif
return 0;
}
write32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
/* wake on ConnectStatusChange, matching external hubs */
- set32(OHCI0_HC_RH_STATUS, RH_HS_DRWE);
+ write32(OHCI0_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
/* Choose the interrupts we care about now, others later on demand */
write32(OHCI0_HC_INT_STATUS, ~0);
write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
+ //wtf?
+ wait_ms ((read32(OHCI0_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
+
+ configure_ports((u8)1);
irq_restore(cookie);
dbg_op_state();
}
+static void configure_ports(u8 from_init)
+{
+ printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
+ printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
+ printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
+ printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
+ printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+
+ setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
+ setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+ printf("configure_ports done\n");
+}
+
+static void setup_port(u32 reg, u8 from_init)
+{
+ u32 port = read32(reg);
+ if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
+ write32(reg, RH_PS_CSC);
+
+ wait_ms(150);
+
+ /* clear CSC flag, set PES and start port reset (PRS) */
+ write32(reg, RH_PS_PES);
+ while(!(read32(reg) & RH_PS_PES)) {
+ printf("fu\n");
+ return;
+ }
+
+ write32(reg, RH_PS_PRS);
+
+ /* spin until port reset is complete */
+ while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
+ printf("loop done\n");
+
+ (void) usb_add_device();
+ }
+}
+
void hcdi_irq()
{
/* read interrupt status */
if (flags & OHCI_INTR_RHSC) {
printf("RootHubStatusChange\n");
/* TODO: set some next_statechange variable... */
- u32 port1 = read32(OHCI0_HC_RH_PORT_STATUS_1);
- u32 port2 = read32(OHCI0_HC_RH_PORT_STATUS_2);
- printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
- printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
- printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
- printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", port1);
- printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", port2);
-
- if((port1 & RH_PS_CCS) && (port1 & RH_PS_CSC)) {
- wait_ms(100);
-
- /* clear CSC flag, set PES and start port reset (PRS) */
- write32(OHCI0_HC_RH_PORT_STATUS_1, port1 | RH_PS_CSC | RH_PS_PES | RH_PS_PRS);
-
- /* spin until port reset is complete */
- port1 = read32(OHCI0_HC_RH_PORT_STATUS_1);
- while(!(port1 & RH_PS_PRSC)) {
- udelay(2);
- port1 = read32(OHCI0_HC_RH_PORT_STATUS_1);
- }
-
- (void) usb_add_device();
- }
- if((port2 & RH_PS_CCS) && (port2 & RH_PS_CSC)) {
- wait_ms(100);
-
- /* clear CSC flag, set PES and start port reset (PRS) */
- write32(OHCI0_HC_RH_PORT_STATUS_2, port2 | RH_PS_CSC | RH_PS_PES | RH_PS_PRS);
-
- /* spin until port reset is complete */
- port2 = read32(OHCI0_HC_RH_PORT_STATUS_2);
- while(!(port2 & RH_PS_PRSC)) {
- udelay(2);
- port2 = read32(OHCI0_HC_RH_PORT_STATUS_2);
- }
-
- (void) usb_add_device();
- }
-
+ configure_ports(0);
write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
}
/* ResumeDetected */
projects / ppcskel.git / blobdiff