#include "host.h"
#include "../usbspec/usb11spec.h"
-// macro for accessing u32 variables that need to be in little endian byte order;
-// whenever you read or write from an u32 field that the ohci host controller
-// will read or write from too, use this macro for access!
-#define ACCESS_LE(dword) (u32)( (((dword) & 0xFF000000) >> 24) | \
+/* activate control_quirk (from MIKE) */
+//#define _USE_C_Q
+
+/* macro for accessing u32 variables that need to be in little endian byte order;
+ *
+ * whenever you read or write from an u32 field that the ohci host controller
+ * will read or write from too, use this macro for access!
+ */
+#define LE(dword) (u32)( (((dword) & 0xFF000000) >> 24) | \
(((dword) & 0x00FF0000) >> 8) | \
(((dword) & 0x0000FF00) << 8) | \
(((dword) & 0x000000FF) << 24) )
-static struct endpoint_descriptor *allocate_endpoint();
-static struct general_td *allocate_general_td(size_t);
-static void control_quirk();
+static struct general_td *allocate_general_td();
static void dbg_op_state();
-static void dbg_td_flag(u32 flag);
static void configure_ports(u8 from_init);
static void setup_port(u32 reg, u8 from_init);
static struct ohci_hcca hcca_oh0;
+#ifdef _USE_C_Q
static struct endpoint_descriptor *allocate_endpoint()
{
struct endpoint_descriptor *ep;
ep = (struct endpoint_descriptor *)memalign(16, sizeof(struct endpoint_descriptor));
- ep->flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
- ep->headp = ep->tailp = ep->nexted = ACCESS_LE(0);
+ memset(ep, 0, sizeof(struct endpoint_descriptor));
+ ep->flags = LE(OHCI_ENDPOINT_GENERAL_FORMAT);
+ ep->headp = ep->tailp = ep->nexted = LE(0);
return ep;
}
+#endif
-static struct general_td *allocate_general_td(size_t bsize)
+static struct general_td *allocate_general_td()
{
struct general_td *td;
td = (struct general_td *)memalign(16, sizeof(struct general_td));
- td->flags = ACCESS_LE(0);
- // TODO !! nexttd?
- td->nexttd = ACCESS_LE(virt_to_phys(td));
- //td->nexttd = ACCESS_LE(0);
- if(bsize == 0) {
- td->cbp = td->be = ACCESS_LE(0);
- } else {
- //td->cbp = ACCESS_LE(virt_to_phys(memalign(16, bsize))); //memailgn required here?
- td->cbp = ACCESS_LE(virt_to_phys(malloc(bsize)));
- memset(phys_to_virt(ACCESS_LE(td->cbp)), 0, bsize);
- td->be = ACCESS_LE(ACCESS_LE(td->cbp) + bsize - 1);
- }
+ memset(td, 0, sizeof(struct general_td));
+ td->flags = LE(0);
+ td->nexttd = LE(0);
+ td->cbp = td->be = LE(0);
return td;
}
+#ifdef _USE_C_Q
static void control_quirk()
{
static struct endpoint_descriptor *ed = 0; /* empty ED */
return;
}
-#define ED_MASK ((u32)~0x0f)
- ed->tailp = ed->headp = ACCESS_LE(virt_to_phys((void*) ((u32)td & ED_MASK)));
- ed->flags |= ACCESS_LE(OHCI_ENDPOINT_DIRECTION_OUT);
+ ed->tailp = ed->headp = LE(virt_to_phys((void*) ((u32)td & OHCI_ENDPOINT_HEAD_MASK)));
+ ed->flags |= LE(OHCI_ENDPOINT_DIRECTION_OUT);
}
/*
printf("nohead!\n");
}
}
+#endif
static void dbg_op_state()
printf("********************************************************\n");
}
+static void general_td_fill(struct general_td *dest, const usb_transfer_descriptor *src)
+{
+ if(src->actlen) {
+ dest->cbp = LE(virt_to_phys(src->buffer));
+ dest->be = LE(LE(dest->cbp) + src->actlen - 1);
+ /* save virtual address here */
+ dest->bufaddr = (u32) src->buffer;
+ }
+ else {
+ dest->cbp = dest->be = LE(0);
+ dest->bufaddr = 0;
+ }
+ dest->buflen = src->actlen;
-/**
- * Enqueue a transfer descriptor.
- */
-u8 hcdi_enqueue(usb_transfer_descriptor *td) {
- control_quirk(); //required? YES! :O ... erm... or no? :/
- u32 tmptdbuffer;
-
- static struct endpoint_descriptor dummyconfig;
- memset(&dummyconfig, 0, 16);
- dummyconfig.flags = ACCESS_LE(OHCI_ENDPOINT_GENERAL_FORMAT);
- dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
-
- printf( "===========================\n"
- "===========================\n");
- printf("td->buffer(1): 0x%08X\n", (void*)td->buffer);
- sync_before_read(&hcca_oh0, 256);
- printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
- printf("HCCA->frame_no: %d\nhcca->hccapad1: %d\n",
- ((ACCESS_LE(hcca_oh0.frame_no) & 0xffff)>>16),
- ACCESS_LE(hcca_oh0.frame_no)&0x0000ffff );
-
- struct general_td *tmptd = allocate_general_td(td->actlen);
- (void) memcpy((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))), td->buffer, td->actlen);
-
- tmptd->flags &= ACCESS_LE(~OHCI_TD_DIRECTION_PID_MASK);
- switch(td->pid) {
+ dest->flags &= LE(~OHCI_TD_DIRECTION_PID_MASK);
+ switch(src->pid) {
case USB_PID_SETUP:
printf("pid_setup\n");
- tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_SETUP);
+ dest->flags |= LE(OHCI_TD_DIRECTION_PID_SETUP);
+ dest->flags |= LE(OHCI_TD_TOGGLE_0);
+ dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
break;
case USB_PID_OUT:
printf("pid_out\n");
- tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_OUT);
+ dest->flags |= LE(OHCI_TD_DIRECTION_PID_OUT);
+ dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
+
+ /*
+ * TODO: just temporary solution! (consider it with len?)
+ * there can be also regular PID_OUT pakets
+ */
+ dest->flags |= LE(OHCI_TD_TOGGLE_1);
break;
case USB_PID_IN:
printf("pid_in\n");
- tmptd->flags |= ACCESS_LE(OHCI_TD_DIRECTION_PID_IN);
+ dest->flags |= LE(OHCI_TD_DIRECTION_PID_IN);
+ if(src->maxp > src->actlen) {
+ dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
+ printf("round buffer!\n");
+ }
+ /*
+ * let the endpoint do the togglestuff!
+ * TODO: just temporary solution!
+ * there can be also inregular PID_IN pakets (@Status Stage)
+ */
+ dest->flags |= LE(OHCI_TD_TOGGLE_CARRY);
break;
}
- tmptd->flags |= ACCESS_LE(((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0) /*| OHCI_TD_BUFFER_ROUNDING*/);
- //tmptd->flags |= ACCESS_LE(OHCI_TD_TOGGLE_1);
+ dest->flags |= LE(OHCI_TD_SET_DELAY_INTERRUPT(7));
+}
- printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
- hexdump(tmptd, sizeof(struct general_td));
- //save buffer adress here; HC may change tmptd->cbp
- tmptdbuffer = (u32) phys_to_virt(ACCESS_LE(tmptd->cbp));
- printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
- hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+#ifdef _DU_OHCI_F
+static void dump_address(void *addr, u32 size, const char* str)
+{
+ printf("%s hexdump (%d) @ 0x%08X:\n", str, size, addr);
+ hexdump(addr, size);
+}
+#endif
- sync_after_write(tmptd, sizeof(struct general_td));
- sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+static struct endpoint_descriptor _edhead;
+struct endpoint_descriptor *edhead = 0;
+void hcdi_fire()
+{
+#ifdef _DU_OHCI_F
+ printf("<^> <^> <^> hcdi_fire(start)\n");
+#endif
-#define ED_MASK ((u32)~0x0f)
- dummyconfig.headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
+ if(edhead == 0)
+ return;
- dummyconfig.flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
- OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
- OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
- OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
+#ifdef _USE_C_Q
+ required? YES! :O ... erm... or no? :/ ... in fact I have no idea
+ control_quirk();
+#endif
- printf("dummyconfig hexdump (before) 0x%08X:\n", &dummyconfig);
- hexdump((void*) &dummyconfig, 16);
+ write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
- sync_after_write(&dummyconfig, 16);
- write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(&dummyconfig));
+ /* sync it all */
+ sync_after_write(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
+ dump_address(edhead, sizeof(struct endpoint_descriptor), "edhead(before)");
+#endif
+
+ struct general_td *x = phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
+ while(virt_to_phys(x)) {
+ sync_after_write(x, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ dump_address(x, sizeof(struct general_td), "x(before)");
+#endif
- printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
- printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
+ if(x->buflen > 0) {
+ sync_after_write((void*) phys_to_virt(LE(x->cbp)), x->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) phys_to_virt(LE(x->cbp)), x->buflen, "x->cbp(before)");
+#endif
+ }
+ x = phys_to_virt(LE(x->nexttd));
+ }
+
+ /* trigger control list */
set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
- //printf("+++++++++++++++++++++++++++++\n");
- /* spin until the controller is done with the control list */
- //printf("current: 0x%08X\n", current);
+ struct general_td *n=0, *prev = 0, *next = 0;
+ /* poll until edhead->headp is null */
+ do {
+ sync_before_read(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
+ printf("edhead->headp: 0x%08X\n", LE(edhead->headp));
+ udelay(10000);
+#endif
+
+ /* if halted, debug output plz. will break the transfer */
+ if((LE(edhead->headp) & OHCI_ENDPOINT_HALTED)) {
+ n = phys_to_virt(LE(edhead->headp)&~0xf);
+ prev = phys_to_virt((u32)prev);
+#ifdef _DU_OHCI_F
+ printf("halted!\n");
+#endif
- //don't use this quirk stuff here!
-#if 1
- while(!read32(OHCI0_HC_CTRL_CURRENT_ED)) {
- }
+ sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("n: 0x%08X\n", n);
+ dump_address(n, sizeof(struct general_td), "n(after)");
+#endif
+ if(n->buflen > 0) {
+ sync_before_read((void*) n->bufaddr, n->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
#endif
+ }
+ dbg_td_flag(LE(n->flags));
- udelay(20000);
- u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
- printf("current: 0x%08X\n", current);
- printf("+++++++++++++++++++++++++++++\n");
- udelay(20000);
+ sync_before_read((void*) prev, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("prev: 0x%08X\n", prev);
+ dump_address(prev, sizeof(struct general_td), "prev(after)");
+#endif
+ if(prev->buflen >0) {
+ sync_before_read((void*) prev->bufaddr, prev->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) prev->bufaddr, prev->buflen, "prev->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F
+ dbg_td_flag(LE(prev->flags));
+ printf("halted end!\n");
+#endif
+ return;
+ }
+ prev = (struct general_td*) (LE(edhead->headp)&~0xf);
+ } while(LE(edhead->headp)&~0xf);
- sync_before_read(tmptd, sizeof(struct general_td));
- printf("tmptd hexdump (after) 0x%08X:\n", tmptd);
- hexdump(tmptd, sizeof(struct general_td));
- dbg_td_flag(ACCESS_LE(tmptd->flags));
+ n = phys_to_virt(read32(OHCI0_HC_DONE_HEAD) & ~1);
+#ifdef _DU_OHCI_F
+ printf("hc_done_head: 0x%08X\n", read32(OHCI0_HC_DONE_HEAD));
+#endif
- sync_before_read((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- printf("tmptd->cbp hexdump (after) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
- hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
+ prev = 0; next = 0;
+ /* reverse done queue */
+ while(virt_to_phys(n) && edhead->tdcount) {
+ sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("n: 0x%08X\n", n);
+ printf("next: 0x%08X\n", next);
+ printf("prev: 0x%08X\n", prev);
+#endif
- sync_before_read(&dummyconfig, 16);
- printf("dummyconfig hexdump (after) 0x%08X:\n", &dummyconfig);
- hexdump((void*) &dummyconfig, 16);
+ next = n;
+ n = (struct general_td*) phys_to_virt(LE(n->nexttd));
+ next->nexttd = (u32) prev;
+ prev = next;
- sync_before_read(&hcca_oh0, 256);
- printf("done head (nach sync): 0x%08X\n", ACCESS_LE(hcca_oh0.done_head));
-
- struct general_td* donetd = phys_to_virt(ACCESS_LE(hcca_oh0.done_head)&~1);
- sync_before_read(donetd, 16);
- printf("done head hexdump: 0x%08X\n", donetd);
- hexdump((void*) donetd, 16);
-
- u32 newlen = 0;
- if(td->actlen) {
- sync_before_read((void*) tmptdbuffer, td->actlen);
- newlen = (u32)phys_to_virt(ACCESS_LE(tmptd->cbp)) - tmptdbuffer;
- printf("WOOOOT newlen: %d\n", newlen);
- hexdump((void*) tmptdbuffer, newlen);
+ edhead->tdcount--;
+ }
+
+ n = next;
+ prev = 0;
+ while(virt_to_phys(n)) {
+#ifdef _DU_OHCI_F
+ dump_address(n, sizeof(struct general_td), "n(after)");
+#endif
+ if(n->buflen > 0) {
+ sync_before_read((void*) n->bufaddr, n->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F
+ dbg_td_flag(LE(n->flags));
+#endif
+ prev = n;
+ n = (struct general_td*) n->nexttd;
+ free(prev);
}
- sync_before_read((void*) (phys_to_virt(ACCESS_LE(tmptd->cbp))-newlen), td->actlen);
- printf("td->buffer: 0x%08X\np2v(A_L(tmptd->cbp: 0x%08X\ntd->actlen: %d\n", (void*) (td->buffer), phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
- (void) memcpy((void*) (td->buffer), phys_to_virt(ACCESS_LE(tmptd->cbp))-newlen, td->actlen);
+ hcca_oh0.done_head = 0;
+ sync_after_write(&hcca_oh0, sizeof(hcca_oh0));
write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
- dummyconfig.headp = dummyconfig.tailp = dummyconfig.nexted = ACCESS_LE(0);
- write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(0));
+ edhead = 0;
+#ifdef _DU_OHCI_F
+ printf("<^> <^> <^> hcdi_fire(end)\n");
+#endif
+}
- /*
- * TD should be free'd after taking it from the done queue.
- * but we are very very dirty and do it anyway :p
- */
+/**
+ * Enqueue a transfer descriptor.
+ */
+u8 hcdi_enqueue(const usb_transfer_descriptor *td) {
+#ifdef _DU_OHCI_Q
+ printf("*()*()*()*()*()*()*() hcdi_enqueue(start)\n");
+#endif
+ if(!edhead) {
+ edhead = &_edhead;
+ memset(edhead, 0, sizeof(struct endpoint_descriptor));
+ edhead->flags = LE(OHCI_ENDPOINT_GENERAL_FORMAT);
+ edhead->headp = edhead->tailp = edhead->nexted = LE(0);
+ edhead->flags |= LE(OHCI_ENDPOINT_LOW_SPEED |
+ OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
+ OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
+ OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
+ edhead->tdcount = 0;
+ }
- /* only when a buffer is allocated */
-#if 0
- if(td->actlen)
- free((void*)tmptdbuffer);
- free(tmptd);
+ struct general_td *tdhw = allocate_general_td();
+ general_td_fill(tdhw, td);
+ edhead->tdcount ++;
+
+ if(!edhead->headp) {
+ /* first transfer */
+ edhead->headp = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
+ }
+ else {
+ /* headp in endpoint already exists
+ * => go to list end
+ */
+ struct general_td *n = (struct general_td*) phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
+ while(LE(n->nexttd)) {
+ n = phys_to_virt(LE(n->nexttd));
+ }
+ n->nexttd = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
+#ifdef _DU_OHCI_Q
+ printf("n: 0x%08X\n", n);
+ printf("n->nexttd: 0x%08X\n", phys_to_virt(LE(n->nexttd)));
+#endif
+ }
+
+#ifdef _DU_OHCI_Q
+ printf("*()*()*()*()*()*()*() hcdi_enqueue(end)\n");
#endif
return 0;
}
+
/**
* Remove an transfer descriptor from transfer queue.
*/
static void configure_ports(u8 from_init)
{
+#ifdef _DU_OHCI_RH
printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+#endif
setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+#ifdef _DU_OHCI_RH
printf("configure_ports done\n");
+#endif
}
static void setup_port(u32 reg, u8 from_init)
/* clear CSC flag, set PES and start port reset (PRS) */
write32(reg, RH_PS_PES);
while(!(read32(reg) & RH_PS_PES)) {
+#ifdef _DU_OHCI_RH
printf("fu\n");
+#endif
return;
}
/* spin until port reset is complete */
while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
+#ifdef _DU_OHCI_RH
printf("loop done\n");
+#endif
(void) usb_add_device();
}
void show_frame_no()
{
sync_before_read(&hcca_oh0, 256);
- printf("***** frame_no: %d *****\n", ACCESS_LE(hcca_oh0.frame_no));
+ printf("***** frame_no: %d *****\n", LE(hcca_oh0.frame_no));
}
projects / ppcskel.git / blobdiff