#include "host.h"
#include "../usbspec/usb11spec.h"
+/* activate control_quirk (from MIKE) */
+//#define _USE_C_Q
+
/* macro for accessing u32 variables that need to be in little endian byte order;
*
* whenever you read or write from an u32 field that the ohci host controller
(((dword) & 0x0000FF00) << 8) | \
(((dword) & 0x000000FF) << 24) )
-static struct endpoint_descriptor *allocate_endpoint();
static struct general_td *allocate_general_td();
-static void control_quirk();
static void dbg_op_state();
-//static void dbg_td_flag(u32 flag);
static void configure_ports(u8 from_init);
static void setup_port(u32 reg, u8 from_init);
static struct ohci_hcca hcca_oh0;
+#ifdef _USE_C_Q
static struct endpoint_descriptor *allocate_endpoint()
{
struct endpoint_descriptor *ep;
ep = (struct endpoint_descriptor *)memalign(16, sizeof(struct endpoint_descriptor));
+ memset(ep, 0, sizeof(struct endpoint_descriptor));
ep->flags = LE(OHCI_ENDPOINT_GENERAL_FORMAT);
ep->headp = ep->tailp = ep->nexted = LE(0);
return ep;
}
+#endif
static struct general_td *allocate_general_td()
{
struct general_td *td;
td = (struct general_td *)memalign(16, sizeof(struct general_td));
+ memset(td, 0, sizeof(struct general_td));
td->flags = LE(0);
td->nexttd = LE(0);
td->cbp = td->be = LE(0);
return td;
}
+#ifdef _USE_C_Q
static void control_quirk()
{
static struct endpoint_descriptor *ed = 0; /* empty ED */
return;
}
-#define ED_MASK ((u32)~0x0f)
- ed->tailp = ed->headp = LE(virt_to_phys((void*) ((u32)td & ED_MASK)));
+ ed->tailp = ed->headp = LE(virt_to_phys((void*) ((u32)td & OHCI_ENDPOINT_HEAD_MASK)));
ed->flags |= LE(OHCI_ENDPOINT_DIRECTION_OUT);
}
printf("nohead!\n");
}
}
+#endif
static void dbg_op_state()
}
}
-#if 0
static void dbg_td_flag(u32 flag)
{
printf("**************** dbg_td_flag: 0x%08X ***************\n", flag);
printf(" R: %X\n", (flag>>18)&1);
printf("********************************************************\n");
}
-#endif
static void general_td_fill(struct general_td *dest, const usb_transfer_descriptor *src)
{
- dest->bufaddr = dest->cbp = LE(virt_to_phys(src->buffer));
- dest->be = src->actlen ? LE(LE(dest->cbp) + src->actlen - 1) : LE(0);
- dest->flags &= LE(~OHCI_TD_DIRECTION_PID_MASK);
+ if(src->actlen) {
+ dest->cbp = LE(virt_to_phys(src->buffer));
+ dest->be = LE(LE(dest->cbp) + src->actlen - 1);
+ /* save virtual address here */
+ dest->bufaddr = (u32) src->buffer;
+ }
+ else {
+ dest->cbp = dest->be = LE(0);
+ dest->bufaddr = 0;
+ }
+
dest->buflen = src->actlen;
+ dest->flags &= LE(~OHCI_TD_DIRECTION_PID_MASK);
switch(src->pid) {
case USB_PID_SETUP:
printf("pid_setup\n");
case USB_PID_IN:
printf("pid_in\n");
dest->flags |= LE(OHCI_TD_DIRECTION_PID_IN);
- dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
+ if(src->maxp > src->actlen) {
+ dest->flags |= LE(OHCI_TD_BUFFER_ROUNDING);
+ printf("round buffer!\n");
+ }
/*
* let the endpoint do the togglestuff!
* TODO: just temporary solution!
* there can be also inregular PID_IN pakets (@Status Stage)
*/
dest->flags |= LE(OHCI_TD_TOGGLE_CARRY);
-#if 0
- /* should be done by HC!
- * first pid_in start with DATA0 */
- */
- dummyconfig.headp = LE( src->togl ?
- LE(dummyconfig.headp) | OHCI_ENDPOINT_TOGGLE_CARRY :
- LE(dummyconfig.headp) & ~OHCI_ENDPOINT_TOGGLE_CARRY);
-#endif
break;
}
dest->flags |= LE(OHCI_TD_SET_DELAY_INTERRUPT(7));
-#if 1
- // not necessary here anymore?
- sync_after_write(dest, sizeof(struct general_td));
- sync_after_write((void*) phys_to_virt(LE(dest->cbp)), src->actlen);
-#endif
}
+#ifdef _DU_OHCI_F
static void dump_address(void *addr, u32 size, const char* str)
{
- sync_before_read(addr, size);
- printf("%s hexdump @ 0x%08X:\n", str, addr);
+ printf("%s hexdump (%d) @ 0x%08X:\n", str, size, addr);
hexdump(addr, size);
}
+#endif
+static struct endpoint_descriptor _edhead;
struct endpoint_descriptor *edhead = 0;
void hcdi_fire()
{
+#ifdef _DU_OHCI_F
printf("<^> <^> <^> hcdi_fire(start)\n");
+#endif
+
+ if(edhead == 0)
+ return;
- control_quirk(); //required? YES! :O ... erm... or no? :/ ... in fact I have no idea
+#ifdef _USE_C_Q
+ required? YES! :O ... erm... or no? :/ ... in fact I have no idea
+ control_quirk();
+#endif
+
+ write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
/* sync it all */
sync_after_write(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
dump_address(edhead, sizeof(struct endpoint_descriptor), "edhead(before)");
+#endif
- struct general_td *x = phys_to_virt(LE(edhead->headp));
+ struct general_td *x = phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
while(virt_to_phys(x)) {
sync_after_write(x, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
dump_address(x, sizeof(struct general_td), "x(before)");
-
+#endif
+
if(x->buflen > 0) {
- sync_after_write((void*) x->cbp, x->buflen);
+ sync_after_write((void*) phys_to_virt(LE(x->cbp)), x->buflen);
+#ifdef _DU_OHCI_F
dump_address((void*) phys_to_virt(LE(x->cbp)), x->buflen, "x->cbp(before)");
+#endif
}
x = phys_to_virt(LE(x->nexttd));
}
/* trigger control list */
- u32 wait=0;
set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
- //don't use this quirk stuff here!?
-#if 1
- while(!read32(OHCI0_HC_CTRL_CURRENT_ED)) {
- }
+ struct general_td *n=0, *prev = 0, *next = 0;
+ /* poll until edhead->headp is null */
+ do {
+ sync_before_read(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
+ printf("edhead->headp: 0x%08X\n", LE(edhead->headp));
+ udelay(10000);
#endif
- printf("+++++++++++++++++++++++++++++\n");
- printf("wait: %d\n", wait);
- udelay(100000);
- sync_before_read(&hcca_oh0, sizeof(hcca_oh0));
- struct general_td *n = phys_to_virt(LE(hcca_oh0.done_head));
- printf("done_head: 0x%08X\n", n);
-#if 0
- struct general_td *prev = 0;
- while(n) {
- if(prev) {
- free(prev);
+ /* if halted, debug output plz. will break the transfer */
+ if((LE(edhead->headp) & OHCI_ENDPOINT_HALTED)) {
+ n = phys_to_virt(LE(edhead->headp)&~0xf);
+ prev = phys_to_virt((u32)prev);
+#ifdef _DU_OHCI_F
+ printf("halted!\n");
+#endif
+
+ sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("n: 0x%08X\n", n);
+ dump_address(n, sizeof(struct general_td), "n(after)");
+#endif
+ if(n->buflen > 0) {
+ sync_before_read((void*) n->bufaddr, n->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
+#endif
+ }
+ dbg_td_flag(LE(n->flags));
+
+ sync_before_read((void*) prev, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("prev: 0x%08X\n", prev);
+ dump_address(prev, sizeof(struct general_td), "prev(after)");
+#endif
+ if(prev->buflen >0) {
+ sync_before_read((void*) prev->bufaddr, prev->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) prev->bufaddr, prev->buflen, "prev->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F
+ dbg_td_flag(LE(prev->flags));
+ printf("halted end!\n");
+#endif
+ return;
}
+ prev = (struct general_td*) (LE(edhead->headp)&~0xf);
+ } while(LE(edhead->headp)&~0xf);
+
+ n = phys_to_virt(read32(OHCI0_HC_DONE_HEAD) & ~1);
+#ifdef _DU_OHCI_F
+ printf("hc_done_head: 0x%08X\n", read32(OHCI0_HC_DONE_HEAD));
+#endif
+
+ prev = 0; next = 0;
+ /* reverse done queue */
+ while(virt_to_phys(n) && edhead->tdcount) {
sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("n: 0x%08X\n", n);
+ printf("next: 0x%08X\n", next);
+ printf("prev: 0x%08X\n", prev);
+#endif
+
+ next = n;
+ n = (struct general_td*) phys_to_virt(LE(n->nexttd));
+ next->nexttd = (u32) prev;
+ prev = next;
+
+ edhead->tdcount--;
+ }
+
+ n = next;
+ prev = 0;
+ while(virt_to_phys(n)) {
+#ifdef _DU_OHCI_F
dump_address(n, sizeof(struct general_td), "n(after)");
- dump_address((void*) phys_to_virt(LE(n->cbp)), n->buflen, "n->cbp(after)");
- dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
+#endif
+ if(n->buflen > 0) {
+ sync_before_read((void*) n->bufaddr, n->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F
dbg_td_flag(LE(n->flags));
- n = prev = phys_to_virt(LE(n->nexttd));
+#endif
+ prev = n;
+ n = (struct general_td*) n->nexttd;
+ free(prev);
}
+
hcca_oh0.done_head = 0;
sync_after_write(&hcca_oh0, sizeof(hcca_oh0));
-#endif
write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
-// free(edhead);
-
edhead = 0;
+
+#ifdef _DU_OHCI_F
printf("<^> <^> <^> hcdi_fire(end)\n");
+#endif
}
/**
* Enqueue a transfer descriptor.
*/
u8 hcdi_enqueue(const usb_transfer_descriptor *td) {
+#ifdef _DU_OHCI_Q
printf("*()*()*()*()*()*()*() hcdi_enqueue(start)\n");
+#endif
if(!edhead) {
- edhead = allocate_endpoint();
+ edhead = &_edhead;
+ memset(edhead, 0, sizeof(struct endpoint_descriptor));
edhead->flags = LE(OHCI_ENDPOINT_GENERAL_FORMAT);
edhead->headp = edhead->tailp = edhead->nexted = LE(0);
edhead->flags |= LE(OHCI_ENDPOINT_LOW_SPEED |
OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
- write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
+ edhead->tdcount = 0;
}
struct general_td *tdhw = allocate_general_td();
general_td_fill(tdhw, td);
+ edhead->tdcount ++;
-#define ED_MASK ((u32)~0x0f)
if(!edhead->headp) {
/* first transfer */
- edhead->headp = LE(virt_to_phys((void*) ((u32)tdhw & ED_MASK)));
+ edhead->headp = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
}
else {
/* headp in endpoint already exists
- * => get to list end
+ * => go to list end
*/
- struct general_td *n = (struct general_td*) phys_to_virt(LE(edhead->headp));
+ struct general_td *n = (struct general_td*) phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
while(LE(n->nexttd)) {
n = phys_to_virt(LE(n->nexttd));
}
- n->nexttd = LE(virt_to_phys((void*) ((u32)tdhw & ED_MASK)));
+ n->nexttd = LE(virt_to_phys((void*) ((u32)tdhw & OHCI_ENDPOINT_HEAD_MASK)));
+#ifdef _DU_OHCI_Q
+ printf("n: 0x%08X\n", n);
+ printf("n->nexttd: 0x%08X\n", phys_to_virt(LE(n->nexttd)));
+#endif
}
+#ifdef _DU_OHCI_Q
printf("*()*()*()*()*()*()*() hcdi_enqueue(end)\n");
+#endif
return 0;
}
static void configure_ports(u8 from_init)
{
+#ifdef _DU_OHCI_RH
printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+#endif
setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+#ifdef _DU_OHCI_RH
printf("configure_ports done\n");
+#endif
}
static void setup_port(u32 reg, u8 from_init)
/* clear CSC flag, set PES and start port reset (PRS) */
write32(reg, RH_PS_PES);
while(!(read32(reg) & RH_PS_PES)) {
+#ifdef _DU_OHCI_RH
printf("fu\n");
+#endif
return;
}
/* spin until port reset is complete */
while(!(read32(reg) & RH_PS_PRSC)); // hint: it may stuck here
+#ifdef _DU_OHCI_RH
printf("loop done\n");
+#endif
(void) usb_add_device();
}