killed the ohci_init FM_INTERVAL fail

[ppcskel.git] / ohci.c

diff --git a/ohci.c b/ohci.c
index 04550f903bfeec385746e216e2b8678476fb3357..699f4029c1dfdd8466389487cc3e245d235cd125 100644 (file)
--- a/ohci.c
+++ b/ohci.c
@@ -14,7 +14,6 @@ Copyright (C) 2009     Sebastian Falbesoner <sebastian.falbesoner@gmail.com>
 #include "irq.h"
 
 #define gecko_printf printf
-#define set32(address, flags) write32(address, read32(address) | flags)
 #define dma_addr(address) virt_to_phys(address)
 
 
@@ -49,6 +48,17 @@ void ohci_init() {
        * see output in ohci.default
        */
 
+       /* disable hc interrupts */
+       set32(OHCI0_HC_INT_DISABLE, OHCI_INTR_MIE);
+
+       /* save fmInterval and calculate FSMPS */
+#define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
+#define FI 0x2edf /* 12000 bits per frame (-1) */
+       u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff;
+       if(fmint != FI)
+              gecko_printf("ohci-- fminterval delta: %d\n", fmint - FI);
+       fmint |= FSMP (fmint) << 16;
+
        /* enable interrupts of both usb host controllers */
        set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
 
@@ -70,10 +80,7 @@ void ohci_init() {
           within 2msec else HC enters RESUME */
 
 
-       //u32 cookie = irq_kill();
-       u32 cookie;
-       _CPU_ISR_Disable(cookie);
-
+          u32 cookie = irq_kill();
 
        /* Tell the controller where the control and bulk lists are
         * The lists are empty now. */
@@ -86,9 +93,10 @@ void ohci_init() {
        /* set periodicstart */
 #define FIT (1<<31)
        u32 fmInterval = read32(OHCI0_HC_FM_INTERVAL) &0x3fff;
+       printf("OHCI0_HC_FMINTERVAL: %08X OCHI0_HC_FMINTERVAL&0x3fff: %08X\n", read32(OHCI0_HC_FM_INTERVAL), fmInterval);
        u32 fit = read32(OHCI0_HC_FM_INTERVAL) & FIT;
 
-       write32(OHCI0_HC_FM_INTERVAL, read32(OHCI0_HC_FM_INTERVAL) | (fit ^ FIT));
+       write32(OHCI0_HC_FM_INTERVAL, fmint | (fit ^ FIT));
        write32(OHCI0_HC_PERIODIC_START, ((9*fmInterval)/10)&0x3fff);
 
        /* testing bla */
@@ -107,11 +115,14 @@ void ohci_init() {
        write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
 
 
-       //irq_restore(cookie);
-       _CPU_ISR_Restore(cookie);
-
+       irq_restore(cookie);
 
        dbg_op_state();
+}
 
+void ohci0_irq() {
+       gecko_printf("ohci_irq\n");
+       write32(OHCI0_HC_INT_STATUS, ~0);
 }
 
+